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ORCIDRobert J. Halstead
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- affiliation (PhD 2015): University of California, Riverside, CA, USA
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2020 – today
- 2021
[j4]Bashar Romanous
, Skyler Windh, Ildar Absalyamov, Prerna Budhkar, Robert J. Halstead, Walid A. Najjar, Vassilis J. Tsotras:
Efficient local locking for massively multithreaded in-memory hash-based operators. VLDB J. 30(3): 333-359 (2021)
2010 – 2019
- 2016
- [c7]Ildar Absalyamov, Prerna Budhkar, Skyler Windh, Robert J. Halstead, Walid A. Najjar, Vassilis J. Tsotras:
FPGA-accelerated group-by aggregation using synchronizing caches. DaMoN 2016: 11:1-11:9 - [p1]Walid A. Najjar, Jason R. Villarreal, Robert J. Halstead:
ROCCC 2.0. FPGAs for Software Programmers 2016: 191-204 - 2015
- [b1]Robert J. Halstead:
Using Multithreaded Techniques to Mask Memory Latency on FPGA Accelerators. University of California, Riverside, USA, 2015 - [j3]Skyler Windh, Xiaoyin Ma, Robert J. Halstead, Prerna Budhkar, Zabdiel Luna, Omar Hussaini, Walid A. Najjar:
High-Level Language Tools for Reconfigurable Computing. Proc. IEEE 103(3): 390-408 (2015) - [c6]Robert J. Halstead, Ildar Absalyamov, Walid A. Najjar, Vassilis J. Tsotras:
FPGA-based Multithreading for In-Memory Hash Joins. CIDR 2015 - 2014
- [j2]Robert J. Halstead, Jason R. Villarreal, Walid A. Najjar:
Compiling irregular applications for reconfigurable systems. Int. J. High Perform. Comput. Netw. 7(4): 258-268 (2014) - [j1]Roger Moussalli, Mariam Salloum, Robert J. Halstead, Walid A. Najjar, Vassilis J. Tsotras:
A study on parallelizing XML path filtering using accelerators. ACM Trans. Embed. Comput. Syst. 13(4): 93:1-93:28 (2014) - 2013
- [c5]Robert J. Halstead, Walid A. Najjar:
Compiled multithreaded data paths on FPGAs for dynamic workloads. CASES 2013: 3:1-3:10 - [c4]Robert J. Halstead, Bharat Sukhwani, Hong Min, Mathew Thoennes, Parijat Dube, Sameh W. Asaad, Balakrishna Iyer:
Accelerating Join Operation for Relational Databases with FPGAs. FCCM 2013: 17-20 - 2011
- [c3]Robert J. Halstead, Jason R. Villarreal, Walid A. Najjar:
Exploring irregular memory accesses on FPGAs. IA3@SC 2011: 31-34 - [c2]Roger Moussalli, Robert J. Halstead, Mariam Salloum, Walid A. Najjar, Vassilis J. Tsotras:
Efficient XML Path Filtering Using GPUs. ADMS@VLDB 2011: 9-18 - 2010
- [c1]Jason R. Villarreal, Adrian Park, Walid A. Najjar, Robert J. Halstead:
Designing Modular Hardware Accelerators in C with ROCCC 2.0. FCCM 2010: 127-134
Coauthor Index
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