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ORCIDQianjian Xing
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- affiliation: Zhejiang University, Hangzhou, China
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2020 – today
- 2021
[j11]Wen-Qi Wu
, Meiting Xue, Qianjian Xing, Feng Yu:
High-Parallelism Hash-Merge Architecture for Accelerating Join Operation on FPGA. IEEE Trans. Circuits Syst. II Express Briefs 68(7): 2650-2654 (2021)- 2020
- [j10]Chenpu Li, Qianjian Xing, Zhenguo Ma:
HKSiamFC: Visual-Tracking Framework Using Prior Information Provided by Staple and Kalman Filter. Sensors 20(7): 2137 (2020) - [j9]Meiting Xue, Qianjian Xing, Chen Feng, Feng Yu, Zhen-Guo Ma:
FPGA-Accelerated Hash Join Operation for Relational Databases. IEEE Trans. Circuits Syst. II Express Briefs 67-II(10): 1919-1923 (2020) - [j8]Chenpu Li, Qianjian Xing, Zhenguo Ma, Ke Zang:
MFCFSiam: A Correlation-Filter-Guided Siamese Network with Multifeature for Visual Tracking. Wirel. Commun. Mob. Comput. 2020: 6681391:1-6681391:19 (2020)
2010 – 2019
- 2018
- [j7]Min Yuan, Qianjian Xing, Zhen-guo Ma, Feng Yu, Yingke Xu:
A Fused Continuous Floating-Point MAC on FPGA. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 101-A(9): 1594-1598 (2018) - 2017
- [j6]Tingting Chen, Weijun Li, Feng Yu, Qianjian Xing:
Modular Serial Pipelined Sorting Architecture for Continuous Variable-Length Sequences with a Very Simple Control Strategy. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(4): 1074-1078 (2017) - [j5]Qianjian Xing, Zhen-guo Ma, Feng Yu:
A Novel Memory-Based Radix-2 Fast Walsh-Hadamard-Fourier Transform Architecture. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(6): 1333-1337 (2017) - [j4]Qianjian Xing, Zhen-guo Ma, Yingke Xu:
A Novel Conflict-Free Parallel Memory Access Scheme for FFT Processors. IEEE Trans. Circuits Syst. II Express Briefs 64-II(11): 1347-1351 (2017) - [j3]Xiubin Mao, Zhen-guo Ma, Feng Yu, Qianjian Xing:
A Continuous-Flow Memory-Based Architecture for Real-Valued FFT. IEEE Trans. Circuits Syst. II Express Briefs 64-II(11): 1352-1356 (2017) - 2015
- [j2]Jinqi Liu, Qianjian Xing, Xiaobo Yin, Xiubin Mao, Feng Yu:
Pipelined Architecture for a Radix-2 Fast Walsh-Hadamard-Fourier Transform Algorithm. IEEE Trans. Circuits Syst. II Express Briefs 62-II(11): 1083-1087 (2015) - 2014
- [j1]Qianjian Xing, Feng Yu, Xiaobo Yin, Bei Zhao:
Radix-R WHT-FFT with Identical Stage-to-Stage Interconnection Pattern. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(5): 1125-1129 (2014)
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