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2000 – 2009
- 2007
[c2]Daniel Murray, James Burnette, Brian Campbell, Mark Chung, Bruce Fernandes, Subhendra Ghosh, Rajat Goel, Greg Hess, Hang Huang, Zhibin Huang, Naveen Javarappa, Pradeep Kanapathipillai, Fabian Klass, Fang Liu, Anup Mehta, Yamini Modukuru, Nishant Nerurkar, Abhijit Radhakrishnan, Sribalan Santhanam, Junji Sugisawa, Shyam Sundar, Honkai John Tam, Ricky Wen, Eric Wu, Jung-Cheng Yeh, John Yong, Sanjay Zambare:
A 2GHz, 7W (max) 64b PowerTM Microprocessor Core. CICC 2007: 725-728- [c1]Brian Campbell, James Burnette, Naveen Javarappa, Vincent von Kaenel:
Power-Efficient Dual-Supply 64kB L1 Caches in a 65nm CMOS Technology. CICC 2007: 729-732
1990 – 1999
- 1998
- [j1]Sribalan Santhanam, Allen J. Baum, David Bertucci, Mike Braganza, Kevin Broch, Todd Broch, James Burnette, Edward Chang, Kwong-Tak Chui, Dan Dobberpuhl, Paul M. Donahue, Joel Grodstein, Insung Kim, Daniel Murray, Mark H. Pearce, Amy Silveria, Dave Souydalay, Aaron Spink, Robert Stepanian, Anand Varadharajan, Vincent R. von Kaenel, Ricky Wen:
A low-cost, 300-MHz, RISC CPU with attached media processor. IEEE J. Solid State Circuits 33(11): 1829-1839 (1998)
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