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ORCIDAlbert van der Werf
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2000 – 2009
- 2007
[j8]James D. Warnock, William Bidermann, Albert van der Werf, Katsuyuki Sato:
Introduction to the Special Issue on the 2006 IEEE International Solid-State Circuits Conference. IEEE J. Solid State Circuits 42(1): 3-6 (2007)- 2001
- [c13]John Dielissen, Jef L. van Meerbergen, Marco Bekooij, Françoise Harmsze, Sergej Sawitzki, Jos Huisken
, Albert van der Werf:
Power-efficient layered turbo decoder processor. DATE 2001: 246-251 - [c12]Marco Bekooij, Loek J. M. Engels, Albert van der Werf, Natalino G. Busá:
Functional units with conditional input/output behavior in VLIW processors. DATE 2001: 822 - [c11]Rafael Peset Llopis, Marcel Oosterhuis, Ramanathan Sethuraman, Paul E. R. Lippens, Albert van der Werf, Steffen Maul, Jim Lin:
HW-SW Co-Design and Verification of a Multi-Standard Video and Image Codec. ISQED 2001: 393-398 - 2000
- [c10]Natalino G. Busá, Albert van der Werf, Marco Bekooij:
Scheduling Coarse-Grain Operations for VLIW Processors. ISSS 2000: 47-54 - [c9]Jeffrey Kang, Albert van der Werf, Paul E. R. Lippens:
Mapping Array Communication onto FIFO Communication - Towards an Implementation. ISSS 2000: 207-214
1990 – 1999
- 1998
- [j7]Wim F. J. Verhaegh, Paul E. R. Lippens, Emile H. L. Aarts, Jef L. van Meerbergen, Albert van der Werf:
The Complexity of Multidimensional Periodic Scheduling. Discret. Appl. Math. 89(1-3): 213-242 (1998) - 1997
- [j6]Albert van der Werf, Fons Brüls, Richard P. Kleihorst, Erwin Waterlander, Math J. W. Verstraelen, Thomas Friedrich:
I.McIC: a single-chip MPEG-2 video encoder for storage. IEEE J. Solid State Circuits 32(11): 1817-1823 (1997) - [j5]Richard P. Kleihorst, Albert van der Werf, Wilhelmus H. A. Brüls, Wim F. J. Verhaegh, Erwin Waterlander:
Mpeg2 Video Encoding in Consumer Electronics. J. VLSI Signal Process. 17(2-3): 241-253 (1997) - 1996
- [j4]Babette van Antwerpen-de Fluiter, Emile H. L. Aarts, Jan H. M. Korst, Wim F. J. Verhaegh, Albert van der Werf:
The complexity of generalized retiming problems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(11): 1340-1353 (1996) - [c8]Wim F. J. Verhaegh, Paul E. R. Lippens, Emile H. L. Aarts, Jef L. van Meerbergen, Albert van der Werf:
Multidimensional Periodic Scheduling Model and Complexity. Euro-Par, Vol. II 1996: 226-235 - 1995
- [j3]Wim F. J. Verhaegh, Paul E. R. Lippens, Emile H. L. Aarts, Jan H. M. Korst, Jef L. van Meerbergen, Albert van der Werf:
Improved force-directed scheduling in high-throughput digital signal processing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(8): 945-960 (1995) - [j2]Jef L. van Meerbergen, Paul E. R. Lippens, Wim F. J. Verhaegh, Albert van der Werf:
PHIDEO: High-level synthesis for high throughput applications. J. VLSI Signal Process. 9(1-2): 89-104 (1995) - 1994
- [c7]Albert van der Werf, Jef L. van Meerbergen, Emile H. L. Aarts, Wim F. J. Verhaegh, Paul E. R. Lippens:
Efficient timing constraint derivation for optimal retiming high speed processing units. HLSS 1994: 48-53 - 1993
- [j1]Jef L. van Meerbergen, Paul E. R. Lippens, B. T. McSweeney, Wim F. J. Verhaegh, Albert van der Werf, A. van Zanten:
Architectural strategies for high-throughput applications. J. VLSI Signal Process. 5(2-3): 201-220 (1993) - [c6]Paul E. R. Lippens, Jef L. van Meerbergen, Wim F. J. Verhaegh, Albert van der Werf:
Allocation of multiport memories for hierarchical data stream. ICCAD 1993: 728-735 - [c5]Albert van der Werf, Emile H. L. Aarts, E. W. Heijnen, Jef L. van Meerbergen, Wim F. J. Verhaegh, Paul E. R. Lippens:
A new method for retiming multi-functional processing units. VLSI 1993: 191-200 - 1992
- [c4]Wim F. J. Verhaegh, Paul E. R. Lippens, Emile H. L. Aarts, Jan H. M. Korst, Albert van der Werf, Jef L. van Meerbergen:
Efficiency improvements for force-directed scheduling. ICCAD 1992: 286-291 - [c3]Albert van der Werf, M. J. H. Peek, Emile H. L. Aarts, Jef L. van Meerbergen, Paul E. R. Lippens, Wim F. J. Verhaegh:
Area optimization of multi-functional processing units. ICCAD 1992: 292-299 - 1991
- [c2]Paul E. R. Lippens, Jef L. van Meerbergen, Albert van der Werf, Wim F. J. Verhaegh, B. T. McSweeney, Jos Huisken, O. McArdle:
PHIDEO: a silicon compiler for high speed algorithms. EURO-DAC 1991: 436-441 - [c1]Albert van der Werf, B. T. McSweeney, Jef L. van Meerbergen, Paul E. R. Lippens, Wim F. J. Verhaegh:
Hierarchical Retiming Including Pipelining. VLSI 1991: 451-460
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