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ORCIDGuido De Sandre
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2010 – 2019
- 2011
[j3]Guido De Sandre, Luca Bettini, Alessandro Pirola, Lionel Marmonier, Marco Pasotti, Massimo Borghi, Paolo Mattavelli
, Paola Zuliani, Luca Scotti, Gianfranco Mastracchio, Ferdinando Bedeschi, Roberto Gastaldi, Roberto Bez:
A 4 Mb LV MOS-Selected Embedded Phase Change Memory in 90 nm Standard CMOS Technology. IEEE J. Solid State Circuits 46(1): 52-63 (2011)- 2010
- [c7]Guido De Sandre, Luca Bettini, Alessandro Pirola, Lionel Marmonier, Marco Pasotti, Massimo Borghi, Paolo Mattavelli, Paola Zuliani, Luca Scotti, Gianfranco Mastracchio, Ferdinando Bedeschi, Roberto Gastaldi, Roberto Bez:
A 90nm 4Mb embedded phase-change memory with 1.2V 12ns read access time and 1MB/s write throughput. ISSCC 2010: 268-269
2000 – 2009
- 2008
- [c6]Guido De Sandre, Luca Bettini, Emanuela Calvetti, G. Giacomi, Marco Pasotti, Massimo Borghi, Paola Zuliani, Roberto Annunziata, I. Tortorelli, Fabio Pellizzer, Roberto Bez:
Program circuit for a phase change memory array with 2 MB/s write throughput for embedded applications. ESSCIRC 2008: 198-201 - 2007
- [j2]Guido De Sandre, Mauro Forti, Paolo Nistri, Amedeo Premoli:
Dynamical Analysis of Full-Range Cellular Neural Networks by Exploiting Differential Variational Inequalities. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(8): 1736-1749 (2007) - 2006
- [c5]Guido De Sandre, Mauro Forti, Paolo Nistri, Amedeo Premoli:
Full-range cellular neural networks and differential variational inequalities. ISCAS 2006 - 2005
- [c4]Alessandro Cabrini, Guido De Sandre, Laura Gobbi, Piero Malcovati, Marco Pasotti, Marco Poles, F. Rigoni, Guido Torelli:
A 1 V, 26 μW extended temperature range band-gap reference in 130-nm CMOS technology. ESSCIRC 2005: 503-506 - [c3]Davide Baderna, Alessandro Cabrini, Guido De Sandre, Francesco De Santis, Marco Pasotti, Andrea Rossini, Guido Torelli:
A 1.2 V sense amplifier for high-performance embeddable NOR flash memories. ISCAS (2) 2005: 1266-1269 - [c2]Carlo Roma, Pierluigi Daglio, Guido De Sandre, Marco Pasotti, Marco Poles:
How Circuit Analysis and Yield Optimization Can Be Used To Detect Circuit Limitations Before Silicon Results. ISQED 2005: 107-112 - 2004
- [j1]Guido De Sandre, Amedeo Premoli:
Piecewise-exponential approximation for fast time-domain simulation of 2-D cellular neural networks. IEEE Trans. Circuits Syst. II Express Briefs 51-II(8): 400-405 (2004) - 2003
- [c1]Michele Borgatti, Lorenzo Cali, Guido De Sandre, Benoit Forêt, David Iezzi, Francesco Lertora, Gilberto Muzzi, Marco Pasotti, Marco Poles, Pier Luigi Rolandi:
A reconfigurable signal processing IC with embedded FPGA and multi-port flash memory. DAC 2003: 691-695
Coauthor Index
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