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2020 – today
- 2024
[c14]Kun-Chi Chiang
, Yung-Chun Li, Wei-Chen Wang, Wei-Kuan Shih:
On Enhancing Data Integrity with Low-cost Retention-Refillable Programming Scheme. SAC 2024: 420-427- 2023
- [j2]Wei-Chen Wang, Chien-Chung Ho, Yung-Chun Li, Liang-Chi Chen, Yu-Ming Chang:
Reaping Both Latency and Reliability Benefits With Elaborate Sanitization Design for 3D TLC NAND Flash. IEEE Trans. Computers 72(11): 3029-3041 (2023) - [c13]Liang-Chi Chen, Shu-Qi Yu, Chien-Chung Ho, Wei-Chen Wang, Yung-Chun Li:
Efficient Sanitization Design for LSM-based Key-Value Store over 3D MLC NAND Flash. SAC 2023: 72-75 - [c12]Chih-Chang Hsieh, Hang-Ting Lue, Yung-Chun Li, Shuo-Nan Hung, Chun-Hsiung Hung, Keh-Chung Wang, Chih-Yuan Lu:
Chip Demonstration of a High-Density (43Gb) and High-Search-Bandwidth (300Gb/s) 3D NAND Based In-Memory Search Accelerator for Ternary Content Addressable Memory (TCAM) and Proximity Search of Hamming Distance. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c11]Chien-Chung Ho, Wei-Chen Wang, Szu-Yu Chen, Yung-Chun Li, Kun-Chi Chiang:
RAM: exploiting restrained and approximate management for enabling neural network training on NVM-based systems. SAC 2022: 116-123 - [c10]Po-Hao Tseng, Yu-Hsuan Lin, Feng-Ming Lee, Tian-Cig Bo, Yung-Chun Li, Ming-Hsiu Lee, Kuang-Yeu Hsieh, Keh-Chung Wang, Chih-Yuan Lu:
In-Memory Approximate Computing Architecture Based on 3D-NAND Flash Memories. VLSI Technology and Circuits 2022: 270-271 - 2021
- [c9]Chien-Chung Ho, Wei-Chen Wang, Te-Hao Hsu, Zhi-Duan Jiang, Yung-Chun Li:
Approximate Programming Design for Enhancing Energy, Endurance and Performance of Neural Network Training on NVM-based Systems. NVMSA 2021: 1-6
2010 – 2019
- 2019
- [c8]Wei-Chen Wang, Ping-Hsien Lin, Yung-Chun Li, Chien-Chung Ho, Yu-Ming Chang, Yuan-Hao Chang:
Toward Instantaneous Sanitization through Disturbance-induced Errors and Recycling Programming over 3D Flash Memory. ICCAD 2019: 1-8 - 2018
- [c7]Chien-Chung Ho, Yung-Chun Li, Yuan-Hao Chang, Yu-Ming Chang:
Achieving defect-free multilevel 3D flash memories with one-shot program design. DAC 2018: 118:1-118:6 - [c6]Ping-Hsien Lin, Yu-Ming Chang, Yung-Chun Li, Wei-Chen Wang, Chien-Chung Ho, Yuan-Hao Chang:
Achieving fast sanitization with zero live data copy for MLC flash memory. ICCAD 2018: 41 - [c5]Chien-Chung Ho, Yung-Chun Li, Ping-Hsien Lin, Wei-Chen Wang, Yuan-Hao Chang:
A Stride-Away Programming Scheme to Resolve Crash Recoverability and Data Readability Issues of Multi-Level-Cell Flash Memory. NVMSA 2018: 67-72 - 2016
- [j1]Yu-Ming Chang, Yuan-Hao Chang, Tei-Wei Kuo, Yung-Chun Li, Hsiang-Pang Li:
Disturbance Relaxation for 3D Flash Memory. IEEE Trans. Computers 65(5): 1467-1483 (2016) - [c4]Yu-Ming Chang, Yung-Chun Li, Ping-Hsien Lin, Hsiang-Pang Li, Yuan-Hao Chang:
Realizing erase-free SLC flash memory with rewritable programming design. CODES+ISSS 2016: 7:1-7:10 - 2015
- [c3]Yu-Ming Chang, Yuan-Hao Chang, Tei-Wei Kuo, Yung-Chun Li, Hsiang-Pang Li:
Achieving SLC performance with MLC flash memory. DAC 2015: 192:1-192:6 - [c2]Yu-Ming Chang, Yung-Chun Li, Yuan-Hao Chang, Tei-Wei Kuo, Chih-Chang Hsieh, Hsiang-Pang Li:
On Relaxing Page Program Disturbance over 3D MLC Flash Memory. ICCAD 2015: 479-486 - 2013
- [c1]Yu-Ming Chang, Yuan-Hao Chang, Tei-Wei Kuo, Hsiang-Pang Li, Yung-Chun Li:
A disturb-alleviation scheme for 3D flash memory. ICCAD 2013: 421-428
Coauthor Index
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