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Aytac Atac
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2010 – 2019
- 2014
- [c7]Aytac Atac, Ralf Wunderlich, Stefan Heinen:
A low power DLL based clock multiplier for multistandard wireless smart grid communication. CSNDSP 2014: 874-877 - [c6]Zhimiao Chen, Yifan Wang, Lei Liao, Ye Zhang, Aytac Atac, Jan Henning Müller, Ralf Wunderlich, Stefan Heinen:
A SystemC Virtual Prototyping based Methodology for Multi-Standard SoC Functional Verification. DAC 2014: 59:1-59:6 - [c5]Aytac Atac, Zhimiao Chen, Lei Liao, Yifan Wang, Martin Schleyer, Ye Zhang, Ralf Wunderlich, Stefan Heinen:
An HDL-Based System Design Methodology for Multistandard RF SoC's. DAC 2014: 167:1-167:6 - [c4]Lei Liao, Aytac Atac, Ye Zhang, Yifan Wang, Zhimiao Chen, Martin Schleyer, Ralf Wunderlich, Stefan Heinen:
A 1.2V, 2.7mA receiver front-end for bluetooth low energy applications. RWS 2014: 37-39 - [c3]Jan Henning Mueller, Ye Zhang, Lei Liao, Aytac Atac, Zhimiao Chen, Bastian Mohr, Stefan Heinen:
A low complexity multi standard dual band CMOS polar transmitter for smart utility networks. SoCC 2014: 426-430 - 2013
- [c2]Aytac Atac, Lei Liao, Yifan Wang, Martin Schleyer, Ye Zhang, Ralf Wunderlich, Stefan Heinen:
A 1.7mW quadrature bandpass ΔΣ ADC with 1MHz BW and 60dB DR at 1MHz IF. ISCAS 2013: 1039-1042 - 2012
- [c1]Aytac Atac, Christian Harder, Ralf Wunderlich, Stefan Heinen:
A low power variable GBW opamp from 60MHz to 2GHz for multi-standard receivers. ICECS 2012: 1-4
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