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ORCIDYuhang Liu 0001
Person information
- affiliation: Chinese Academy of Sciences, Institute of Computing Technology, State Key Laboratory of Computer Architecture, Beijing, China
Other persons with the same name
- Yuhang Liu (aka: Yu-Hang Liu) — disambiguation page
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2020 – today
- 2024
[j8]Yuhang Liu
, Xin Deng, Jiapeng Zhou, Mingyu Chen, Yungang Bao:
Suppressing the Interference Within a Datacenter: Theorems, Metric and Strategy. IEEE Trans. Parallel Distributed Syst. 35(5): 732-750 (2024)- [c15]Yuhang Liu, Mingyu Chen:
Planaria: Pattern Directed Cross-page Composite Prefetcher. DAC 2024: 207:1-207:6 - 2023
- [c14]Yuhang Liu, Xin Deng, Jiapeng Zhou, Mingyu Chen, Yungang Bao:
Ah-Q: Quantifying and Handling the Interference within a Datacenter from a System Perspective. HPCA 2023: 471-484 - 2021
- [j7]Yuhang Liu, Xian-He Sun, Yang Wang, Yungang Bao:
HCDA: from computational thinking to a generalized thinking paradigm. Commun. ACM 64(5): 66-75 (2021) - [c13]Haiyang Pan, Yuhang Liu, Tianyue Lu, Mingyu Chen:
LSP: Collective Cross-Page Prefetching for NVM. DATE 2021: 501-506 - 2020
- [j6]Yangyang Zhao, Mingyu Chen, Yuhang Liu, Zong-Hao Yang, Xiaojing Zhu, Zonghui Hong, Yunge Guo:
IMPULP: A Hardware Approach for In-Process Memory Protection via User-Level Partitioning. J. Comput. Sci. Technol. 35(2): 418-432 (2020)
2010 – 2019
- 2019
- [j5]Yuhang Liu, Xian-He Sun:
LPM: A Systematic Methodology for Concurrent Data Access Pattern Optimization from a Matching Perspective. IEEE Trans. Parallel Distributed Syst. 30(11): 2478-2493 (2019) - [c12]Haiyang Pan, Yuhang Liu, Tianyue Lu, Mingyu Chen:
Characterizations and Architectural Implications of NVM's External DRAM Cache. HPCC/SmartCity/DSS 2019: 373-380 - [c11]Haifeng Li, Tianyue Lu, Yuhang Liu, Mingyu Chen:
Make Page Coloring more Efficient on Slice-Based Three-Level Cache. ICPADS 2019: 310-317 - [c10]Yangyang Zhao, Yuhang Liu, Wei Li, Mingyu Chen:
HCMA: Supporting High Concurrency of Memory Accesses with Scratchpad Memory in FPGAs. NAS 2019: 1-8 - [i1]Yuhang Liu, Luming Wang, Mingyu Chen, Yungang Bao, Yang Wang, Xiang Li:
Gene-Patterns: Should Architecture be Customized for Each Application? CoRR abs/1909.09765 (2019) - 2018
- [j4]Yuhang Liu, Xian-He Sun:
CaL: Extending Data Locality to Consider Concurrency for Performance Optimization. IEEE Trans. Big Data 4(2): 273-288 (2018) - [j3]Jiutian Zhang, Yuhang Liu, Haifeng Li, Xiaojing Zhu, Mingyu Chen:
PTAT: An Efficient and Precise Tool for Tracing and Profiling Detailed TLB Misses. ACM Trans. Embed. Comput. Syst. 17(3): 62:1-62:17 (2018) - 2017
- [j2]Yuhang Liu, Xian-He Sun:
Evaluating the Combined Effect of Memory Capacity and Concurrency for Many-Core Chip Design. ACM Trans. Model. Perform. Evaluation Comput. Syst. 2(2): 9:1-9:25 (2017) - [c9]Wei Li, Yangyang Zhao, Yuhang Liu, Mingyu Chen:
SMEFF: A scalable memory extension fabric for FPGA. FPT 2017: 40-47 - [c8]Tianyue Lu, Yuhang Liu, Haiyang Pan, Mingyu Chen:
TDV Cache: Organizing Off-Chip DRAM Cache of NVMM from a Fusion Perspective. ICCD 2017: 65-72 - [c7]Tianyue Lu, Yuhang Liu, Mingyu Chen:
Fine-Grained Data Committing for Persistent Memory. ISPA/IUCC 2017: 438-443 - [c6]Jiutian Zhang, Yuhang Liu, Xiaojing Zhu, Yuan Ruan, Mingyu Chen:
PTAT: An efficient and precise tool for collecting detailed TLB miss traces. ISPASS 2017: 137-138 - 2016
- [c5]Dandan Li, Senzhang Wang, Shuzhen Yao, Yuhang Liu, Yuanqi Cheng, Xian-He Sun:
Efficient design space exploration by knowledge transfer. CODES+ISSS 2016: 12:1-12:10 - [c4]Dandan Li, Shuzhen Yao, Yuhang Liu, Senzhang Wang, Xian-He Sun:
Efficient design space exploration via statistical sampling and AdaBoost learning. DAC 2016: 142:1-142:6 - [c3]Xian-He Sun, Yuhang Liu:
Utilizing Concurrency: A New Theory for Memory Wall. LCPC 2016: 18-23 - 2015
- [j1]Yuhang Liu, Xian-He Sun:
Reevaluating Data Stall Time with the Consideration of Data Access Concurrency. J. Comput. Sci. Technol. 30(2): 227-245 (2015) - [c2]Yuhang Liu, Xian-He Sun:
LPM: Concurrency-Driven Layered Performance Matching. ICPP 2015: 879-888 - [c1]Yuhang Liu, Xian-He Sun:
C2-bound: a capacity and concurrency driven analytical model for many-core design. SC 2015: 48:1-48:11
Coauthor Index
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