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ORCIDVanchinathan Venkataramani
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Journal Articles
- 2022
[j6]Vanchinathan Venkataramani
, Bruno Bodin, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh:
ASCENT: Communication Scheduling for SDF on Bufferless Software-Defined NoC. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(10): 3266-3275 (2022)- 2020
- [j5]Vanchinathan Venkataramani, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh:
SPECTRUM: A Software-defined Predictable Many-core Architecture for LTE/5G Baseband Processing. ACM Trans. Embed. Comput. Syst. 19(5): 32:1-32:28 (2020) - 2019
- [j4]Vanchinathan Venkataramani, Mun Choon Chan, Tulika Mitra:
Scratchpad-Memory Management for Multi-Threaded Applications on Many-Core Architectures. ACM Trans. Embed. Comput. Syst. 18(1): 10:1-10:28 (2019) - 2018
- [j3]Cheng Tan, Aditi Kulkarni Mohite, Vanchinathan Venkataramani, Manupa Karunaratne, Tulika Mitra, Li-Shiuan Peh:
LOCUS: Low-Power Customizable Many-Core Architecture for Wearables. ACM Trans. Embed. Comput. Syst. 17(1): 16:1-16:26 (2018) - 2017
- [j2]Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Defragmentation of Tasks in Many-Core Architecture. ACM Trans. Archit. Code Optim. 14(1): 2:1-2:21 (2017) - [j1]Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Optimal Greedy Algorithm for Many-Core Scheduling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(6): 1054-1058 (2017)
Conference and Workshop Papers
- 2020
- [c12]Vanchinathan Venkataramani, Anuj Pathania, Tulika Mitra:
Unified Thread- and Data-Mapping for Multi-Threaded Multi-Phase Applications on SPM Many-Cores. DATE 2020: 1496-1501 - [c11]Vanchinathan Venkataramani, Bruno Bodin, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh:
Time-Predictable Software-Defined Architecture with Sdf-Based Compiler Flow for 5g Baseband Processing. ICASSP 2020: 1553-1557 - [c10]Niklas Ueter, Jian-Jia Chen, Georg von der Brüggen, Vanchinathan Venkataramani, Tulika Mitra:
Simultaneous Progressing Switching Protocols for Timing Predictable Real-Time Network-on-Chips. RTCSA 2020: 1-10 - 2019
- [c9]Vanchinathan Venkataramani, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh:
SPECTRUM: a software defined predictable many-core architecture for LTE baseband processing. LCTES 2019: 82-96 - [c8]Vanchinathan Venkataramani, Anuj Pathania, Tulika Mitra:
Scalable Optimal Greedy Scheduler for Asymmetric Multi-/Many-Core Processors. SAMOS 2019: 127-141 - 2018
- [c7]Vanchinathan Venkataramani, Anuj Pathania, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Scalable Dynamic Task Scheduling on Adaptive Many-Core. MCSoC 2018: 168-175 - 2016
- [c6]Cheng Tan, Aditi Kulkarni Mohite, Vanchinathan Venkataramani, Manupa Karunaratne, Tulika Mitra, Li-Shiuan Peh:
LOCUS: low-power customizable many-core architecture for wearables. CASES 2016: 11:1-11:10 - [c5]Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Distributed scheduling for many-cores using cooperative game theory. DAC 2016: 133:1-133:6 - [c4]Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel:
Distributed fair scheduling for many-cores. DATE 2016: 379-384 - 2014
- [c3]Guanwen Zhong, Vanchinathan Venkataramani, Yun Liang, Tulika Mitra, Smaïl Niar:
Design space exploration of multiple loops on FPGAs using high level synthesis. ICCD 2014: 456-463 - 2013
- [c2]Mihai Pricopi, Thannirmalai Somu Muthukaruppan, Vanchinathan Venkataramani, Tulika Mitra, Sanjay Vishin:
Power-performance modeling on asymmetric multi-cores. CASES 2013: 15:1-15:10 - [c1]Thannirmalai Somu Muthukaruppan, Mihai Pricopi, Vanchinathan Venkataramani, Tulika Mitra, Sanjay Vishin:
Hierarchical power management for asymmetric multi-core in dark silicon era. DAC 2013: 174:1-174:9
Informal and Other Publications
- 2019
- [i1]Niklas Ueter, Georg von der Brüggen, Jian-Jia Chen, Tulika Mitra, Vanchinathan Venkataramani:
Simultaneous Progressing Switching Protocols for Timing Predictable Real-Time Network-on-Chips. CoRR abs/1909.09457 (2019)
Coauthor Index
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