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ORCIDRolf B. Hilgendorf
Person information
- affiliation: Technion - Israel Institute of Technology, High Speed Digital Systems Laboratory, Haifa, Israel
- affiliation: IBM Entwicklung GmbH, Böblingen, Germany
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2010 – 2019
- 2014
[c6]Lukas Meder, Philipp C. Schindler, Amos Agmon, Maxim Meltsin
, Rene Bonk, Joachim Meyer, Michael Dreschmann, Alex Tolmachev, Rolf B. Hilgendorf, Moshe Nazarathy, Shalva Ben-Ezra, Thomas Pfeiffer, Wolfgang Freude, Juerg Leuthold, Christian Koos, Jürgen Becker:
Flexible real-time transmitter at 10 Gbit/s for SCFDMA PONs focusing on low-cost ONUs. DASIP 2014: 1-8- [c5]Etgar Israeli, Shahar Tsiper, Deborah Cohen, Eli Shoshan, Rolf B. Hilgendorf, Alex Reysenson, Yonina C. Eldar:
Hardware calibration of the modulated wideband converter. GLOBECOM 2014: 948-953 - 2013
- [c4]Alex Tolmachev, M. Orbach, Maxim Meltsin, Rolf B. Hilgendorf, T. Birk, Moshe Nazarathy:
Real-time FPGA implementation of efficient filter-banks for digitally sub-banded coherent DFT-S OFDM receiver. OFC/NFOEC 2013: 1-3 - 2011
- [c3]Moshe Mishali, Rolf B. Hilgendorf, Eli Shoshan, Ina Rivkin, Yonina C. Eldar:
Generic sensing hardware and real-time reconstruction for structured analog signals. ISCAS 2011: 1748-1751 - [c2]Rolf B. Hilgendorf, Moshe Mishali, Yonina C. Eldar, Eli Shoshan, Ina Rivkin:
Live demonstration: MWC for real-time application. ISCAS 2011: 2002
2000 – 2009
- 2006
- [c1]Erwin B. Cohen, Norman J. Rohrer, Peter A. Sandon, Miles G. Canada, Cédric Lichtenau, Mathew I. Ringler, Paul Kartschoke, Robert Floyd, Jan Heaslip, M. Ross, Thomas Pflueger, Rolf B. Hilgendorf, Pete McCormick, Gerard Salem, J. Connor, Stephen F. Geissler, Dana Thygesen:
A 64B CPU Pair: Dual- and Single-Processor Chips. ISSCC 2006: 333-342 - 2005
- [j3]Norman J. Rohrer, Cédric Lichtenau, Peter A. Sandon, Paul Kartschoke, Erwin B. Cohen, Miles G. Canada, Thomas Pflüger, Mathew I. Ringler, Rolf B. Hilgendorf, Stephen F. Geissler, Jeffrey S. Zimmerman:
A 64-bit microprocessor in 130-nm and 90-nm technologies with power management features. IEEE J. Solid State Circuits 40(1): 19-27 (2005) - 2001
- [j2]Rolf B. Hilgendorf, Wolfram Sauer:
Instruction translation for an experimental S/390 processor. SIGARCH Comput. Archit. News 29(1): 37-42 (2001)
1990 – 1999
- 1999
- [j1]Rolf B. Hilgendorf, Gerald J. Heim, Wolfgang Rosenstiel:
Evaluation of branch-prediction methods on traces from commercial applications. IBM J. Res. Dev. 43(4): 579-594 (1999)
Coauthor Index
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