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Josef Schneider
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Books and Theses
- 2015
- [b1]Josef Schneider:
Temperature, energy and performance: addressing embedded system challenges through fast cache simulation. University of New South Wales, Sydney, Australia, 2015
Conference and Workshop Papers
- 2015
- [c6]Josef Schneider, Jorgen Peddersen, Sri Parameswaran:
Speeding up single pass simulation of PLRUt caches. ASP-DAC 2015: 695-700 - 2014
- [c5]Josef Schneider, Jorgen Peddersen, Sri Parameswaran:
A scorchingly fast FPGA-based Precise L1 LRU cache simulator. ASP-DAC 2014: 412-417 - [c4]Josef Schneider, Jorgen Peddersen, Sri Parameswaran:
MASH{fifo}: A Hardware-Based Multiple Cache Simulator for Rapid FIFO Cache Analysis. DAC 2014: 200:1-200:6 - [c3]Isuru Nawinne, Josef Schneider, Haris Javaid, Sri Parameswaran:
Hardware-based fast exploration of cache hierarchies in application specific MPSoCs. DATE 2014: 1-6 - 2013
- [c2]Josef Schneider, Sri Parameswaran:
An extremely compact JPEG encoder for adaptive embedded systems. DATE 2013: 1063-1064 - [c1]Hussam Amrouch, Thomas Ebi, Josef Schneider, Sridevan Parameswaran, Jörg Henkel:
Analyzing the thermal hotspots in FPGA-based embedded systems. FPL 2013: 1-4
Coauthor Index
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last updated on 2024-11-15 20:36 CET by the dblp team
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