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Journal Articles
- 2014
[j1]Fumihiko Tachibana, Osamu Hirabayashi, Yasuhisa Takeyama, Miyako Shizuno, Atsushi Kawasumi, Keiichi Kushida, Azuma Suzuki, Yusuke Niki, Shinichi Sasaki, Tomoaki Yabe, Yasuo Unekawa:
A 27% Active and 85% Standby Power Reduction in Dual-Power-Supply SRAM Using BL Power Calculator and Digitally Controllable Retention Circuit. IEEE J. Solid State Circuits 49(1): 118-126 (2014)
Conference and Workshop Papers
- 2013
- [c2]Fumihiko Tachibana, Osamu Hirabayashi, Yasuhisa Takeyama, Miyako Shizuno, Atsushi Kawasumi, Keiichi Kushida, Azuma Suzuki, Yusuke Niki, Shinichi Sasaki, Tomoaki Yabe, Yasuo Unekawa:
A 27% active and 85% standby power reduction in dual-power-supply SRAM using BL power calculator and digitally controllable retention circuit. ISSCC 2013: 320-321 - 2011
- [c1]Keiichi Kushida, Osamu Hirabayashi, Fumihiko Tachibana, Hiroyuki Hara, Atsushi Kawasumi, Azuma Suzuki, Yasuhisa Takeyama, Yuki Fujimura, Yusuke Niki, Miyako Shizuno, Shinichi Sasaki, Tomoaki Yabe:
A trimless, 0.5V-1.0V wide voltage operation, high density SRAM macro utilizing dynamic cell stability monitor and multiple memory cell access. A-SSCC 2011: 161-164
Coauthor Index
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