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ORCIDHeeJong Park 0001
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- affiliation: University of Auckland, Department of Electrical and Computer Engineering, New Zealand
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2020 – today
- 2021
[j9]HeeJong Park
, Arvind Easwaran, Etienne Borde:
Online cycle detection for models with mode-dependent input and output dependencies. J. Syst. Archit. 115: 102017 (2021)- [c15]Chuanchao Gao, HeeJong Park, Arvind Easwaran:
An anomaly detection framework for digital twin driven cyber-physical systems. ICCPS 2021: 44-54 - [i3]HeeJong Park, Arvind Easwaran, Etienne Borde:
Online Cycle Detection for Models with Mode-Dependent Input and Output Dependencies. CoRR abs/2102.01928 (2021) - [i2]HeeJong Park, Arvind Easwaran, Sidharta Andalam:
Challenges in Digital Twin Development for Cyber-Physical Production Systems. CoRR abs/2102.03341 (2021) - 2020
- [i1]HeeJong Park, Arvind Easwaran, Sidharta Andalam:
TiLA: Twin-in-the-Loop Architecture for Cyber-Physical Production Systems. CoRR abs/2003.09370 (2020)
2010 – 2019
- 2019
- [j8]Avinash Malik, HeeJong Park, Muhammad Nadeem, Zoran Salcic:
Memory management of safety-critical hard real-time systems designed in SystemJ. Microprocess. Microsystems 64: 101-119 (2019) - [j7]Zoran Salcic, Udayanto Dwi Atmojo, HeeJong Park, Andrew Tzer-Yeu Chen, Kevin I-Kai Wang:
Designing Dynamic and Collaborative Automation and Robotics Software Systems. IEEE Trans. Ind. Informatics 15(1): 540-549 (2019) - [c14]HeeJong Park, Arvind Easwaran, Sidharta Andalam:
TiLA: Twin-in-the-Loop Architecture for Cyber-Physical Production Systems. ICCD 2019: 82-90 - 2018
- [c13]HeeJong Park, Arvind Easwaran, Sidharta Andalam:
Challenges in Digital Twin Development for Cyber-Physical Production Systems. CyPhy/WESE 2018: 28-48 - [c12]Muhammad Nadeem, HeeJong Park, Avinash Malik:
Bandwidth Stealing TDMA Arbitration for Real-Time Multiprocessor Applications. TENCON 2018: 1504-1509 - 2017
- [j6]Zhenmin Li, HeeJong Park, Avinash Malik, Kevin I-Kai Wang, Zoran Salcic, Boris Kuzmin, Michael Glaß, Jürgen Teich:
Using design space exploration for finding schedules with guaranteed reaction times of synchronous programs on multi-core architecture. J. Syst. Archit. 74: 30-45 (2017) - [j5]Zoran Salcic, HeeJong Park, Jürgen Teich, Avinash Malik, Muhammad Nadeem:
Noc-HMP: A Heterogeneous Multicore Processor for Embedded Systems Designed in SystemJ. ACM Trans. Design Autom. Electr. Syst. 22(4): 73:1-73:25 (2017) - [c11]Zoran Salcic, Udayanto Dwi Atmojo, HeeJong Park, Andrew Tzer-Yeu Chen, Kevin I-Kai Wang:
A framework for designing dynamic and interoperable automation and robotics systems. INDIN 2017: 683-686 - 2016
- [j4]HeeJong Park, Zhenmin Li, Avinash Malik, Zoran A. Salcic:
Times Square - Marriage of Real-Time and Logical-Time in GALS and Synchronous Languages. J. Signal Process. Syst. 84(1): 163-180 (2016) - [c10]Zoran A. Salcic, Muhammad Nadeem, HeeJong Park, Jürgen Teich:
A heterogeneous multi-core SoC for mixed criticality industrial automation systems. ETFA 2016: 1-4 - [c9]Zoran A. Salcic, Muhammad Nadeem, HeeJong Park, Jürgen Teich:
Optimizing Latencies and Customizing NoC of Time-Predictable Heterogeneous Multi-core Processor. MCSoC 2016: 233-240 - 2015
- [j3]HeeJong Park, Avinash Malik, Zoran A. Salcic:
Compiling and verifying SC-SystemJ programs for safety-critical reactive systems. Comput. Lang. Syst. Struct. 44: 251-282 (2015) - [j2]Udayanto Dwi Atmojo, Zoran A. Salcic, Kevin I-Kai Wang, HeeJong Park:
System-level approach to the design of ambient intelligence systems based on wireless sensor and actuator networks. J. Ambient Intell. Humaniz. Comput. 6(2): 153-169 (2015) - [j1]HeeJong Park, Avinash Malik, Zoran A. Salcic:
Scheduling Globally Asynchronous Locally Synchronous Programs for Guaranteed Response Times. ACM Trans. Design Autom. Electr. Syst. 20(3): 40:1-40:25 (2015) - [c8]Dez Packwood, Manu Sharma, Ding Ding, HeeJong Park, Zoran A. Salcic, Avinash Malik, Kevin I-Kai Wang:
FPGA-based Mixed-Criticality Execution Platform for SystemJ and the Internet of Industrial Things. ISORC 2015: 174-181 - 2014
- [c7]HeeJong Park, Avinash Malik, Zoran A. Salcic:
WYPIWYE automation systems - An intelligent manufacturing system case study. ETFA 2014: 1-8 - [c6]Roopak Sinha, Valeriy Vyatkin, Zoran Salcic, HeeJong Park:
Competitors or Cousins? Studying the parallels between distributed programming languages SystemJ and IEC61499. ETFA 2014: 1-7 - [c5]HeeJong Park, Avinash Malik, Muhammad Nadeem, Zoran A. Salcic:
The Cardiac Pacemaker: SystemJ versus Safety Critical Java. JTRES 2014: 37 - [c4]HeeJong Park, Avinash Malik, Zoran A. Salcic:
Times square - marriage of real-time and logical-time in GALS and synchronous languages. RTCSA 2014: 1-10 - 2013
- [c3]Muhammad Nadeem, HeeJong Park, Zhenmin Li, Morteza Biglari-Abhari, Zoran Salcic:
GALS-CMP: Chip-Multiprocessor for GALS Embedded Systems. ARCS 2013: 147-158 - [c2]Kevin I-Kai Wang, HeeJong Park, Zoran Salcic, Panith Ratnayaka:
A System-Level Approach for Designing Context-Aware Distributed Pervasive Applications. GPC 2013: 288-298 - [c1]HeeJong Park, Zoran Salcic, Kevin I-Kai Wang, Udayanto Dwi Atmojo, Wei-Tsun Sun, Avinash Malik:
A New Design Paradigm for Designing Reactive Pervasive Concurrent Systems with an Ambient Intelligence Example. TrustCom/ISPA/IUCC 2013: 1188-1197
Coauthor Index
aka: Zoran Salcic
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