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Chun-Yu Lin 0002
Person information
- affiliation: National Taiwan University, Department of Electrical Engineering, Graduate Institute of Engineering, Taipei, Taiwan
- affiliation (former): National Tsing Hua University, Hsinchu, Taiwan
Other persons with the same name
- Chun-Yu Lin — disambiguation page
- Chun-Yu Lin 0001 — National Taiwan Normal University, Department of Electrical Engineering, Taiwan (and 1 more)
- Chun-Yu Lin 0003 — Kyoto University, Bioinformatics Center, Institute for Chemical Research (and 1 more)
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2020 – today
- 2022
- [j3]Chun-Yu Lin, Yu-Wei Huang, Tsung-Hsien Lin:
A Temperature-Compensated Crystal Oscillator With Piecewise Polynomial Varactor Compensation Achieving ±3.75-ppm Inaccuracy From -30°C to 90°C. IEEE Trans. Circuits Syst. II Express Briefs 69(4): 2016-2020 (2022) - 2021
- [c7]Chun-Yu Lin, Yu-Wei Huang, Tsung-Hsien Lin:
A ± 20-ppm -50°C-105°C 1-µA 32.768-kHz Clock Generator with a System-HFXO-Assisted Background Calibration. A-SSCC 2021: 1-3 - [c6]Chun-Yu Lin, Yu-Ting Hung, Tun-Ju Wang, Tsung-Hsien Lin:
29.5 A 0.008mm2 1.5mW 0.625-to-200MHz Fractional Output Divider with 120fsrms Jitter Based on Replica-DTC-Free Background Calibration. ISSCC 2021: 412-414 - 2020
- [c5]Chun-Yu Lin, Tun-Ju Wang, Yu-Ting Hung, Tsung-Hsien Lin:
A 1-200MHz Multiple Output Fractional Divider Using Phase Rotating Technique. VLSI-DAT 2020: 1-2
2010 – 2019
- 2019
- [c4]Chun-Yu Lin, Yu-Ting Hung, Tsung-Hsien Lin:
A 2.4-GHz 500-µW 370-fsrms Integrated Jitter Sub-Sampling Sub-Harmonically Injection-Locked PLL in 90-nm CMOS. A-SSCC 2019: 91-94 - 2017
- [c3]Chun-Yu Lin, Tun-Ju Wang, Tzu-Hsuan Liu, Tsung-Hsien Lin:
An ultra-low power 169-nA 32.768-kHz fractional-N PLL. A-SSCC 2017: 45-48 - [c2]Chun-Yu Lin, Tun-Ju Wang, Tsung-Hsien Lin:
A 1.5-GHz sub-sampling fractional-N PLL for spread-spectrum clock generator in 0.18-μm CMOS. A-SSCC 2017: 253-256 - 2016
- [j2]Yi-Lin Tsai, Chun-Yu Lin, Bang-Cyuan Wang, Tsung-Hsien Lin:
A 330-µW 400-MHz BPSK Transmitter in 0.18- µm CMOS for Biomedical Applications. IEEE Trans. Circuits Syst. II Express Briefs 63-II(5): 448-452 (2016) - [c1]Chun-Yu Lin, Tsung-Hsien Lin:
A 4-GHz ΔΣ fractional-N frequency synthesizer with 2-dimensional quantization noise pushing and fractional spur elimination techniques. A-SSCC 2016: 93-96 - 2013
- [j1]Yao-Hong Liu, Li-Guang Chen, Chun-Yu Lin, Tsung-Hsien Lin:
A 650-pJ/bit MedRadio Transmitter With an FIR-Embedded Phase Modulator for Medical Micro-Power Networks (MMNs). IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(12): 3279-3288 (2013)
Coauthor Index
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last updated on 2024-10-07 22:11 CEST by the dblp team
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