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2020 – today
- 2020
[j33]Jingbin Li
, Jiahui Lv, Beom-Seok Oh, Zhiping Lin, Ya Jun Yu:
Identification of Stress State for Drivers Under Different GPS Navigation Modes. IEEE Access 8: 102773-102783 (2020)
2010 – 2019
- 2019
- [c33]Jingbin Li, Ya Jun Yu:
R-Peak Detection for ECG Signal Based on Local Maximums of Signal Magnitude and Correlation. CISP-BMEI 2019: 1-6 - [c32]Ya Jun Yu, Yi Gong, Jiahao Hu, Chenchang Zhan:
Mind Map for Task-Oriented Teaching of "Digital System Design". TALE 2019: 1-6 - 2017
- [j32]Wen Bin Ye, Xin Lou, Ya Jun Yu:
Design of Low-Power Multiplierless Linear-Phase FIR Filters. IEEE Access 5: 23466-23472 (2017) - [j31]Xin Lou, Ya Jun Yu, Pramod Kumar Meher:
Lower Bound Analysis and Perturbation of Critical Path for Area-Time Efficient Multiple Constant Multiplications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(2): 313-324 (2017) - [c31]Xin Lou, Wenbin Ye, Ya Jun Yu:
Investigation on power consumption of product accumulation block for multiplierless FIR filters. DSP 2017: 1-5 - 2016
- [j30]Wen Bin Ye, Ya Jun Yu:
Greedy Algorithm for the Design of Linear-Phase FIR Filters with Sparse Coefficients. Circuits Syst. Signal Process. 35(4): 1427-1436 (2016) - [j29]Rui Fan, Ya Jun Yu, Yong Liang Guan:
Improved orthogonal frequency division multiplexing with generalised index modulation. IET Commun. 10(8): 969-974 (2016) - [j28]Wen Bin Ye, Ya Jun Yu:
Power Oriented Design of Linear Phase FIR Filters. J. Circuits Syst. Comput. 25(7): 1650075:1-1650075:27 (2016) - [j27]Xin Lou, Ya Jun Yu, Pramod Kumar Meher:
Analysis and Optimization of Product-Accumulation Section for Efficient Implementation of FIR Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(10): 1701-1713 (2016) - [c30]Ya Jun Yu, Zhan Yang, Beom-Seok Oh, Yong Kiang Yeo, Qinglai Liu, Guang-Bin Huang, Zhiping Lin:
Investigation on driver stress utilizing ECG signals with on-board navigation systems in use. ICARCV 2016: 1-6 - 2015
- [j26]Xin Lou, Ya Jun Yu, Pramod Kumar Meher:
Fine-Grained Critical Path Analysis and Optimization for Area-Time Efficient Realization of Multiple Constant Multiplications. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(3): 863-872 (2015) - [j25]Wen Bin Ye, Ya Jun Yu:
Two-Step Optimization Approach for the Design of Multiplierless Linear-Phase FIR Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(5): 1279-1287 (2015) - [j24]Xin Lou, Ya Jun Yu, Pramod Kumar Meher:
New Approach to the Reduction of Sign-Extension Overhead for Efficient Implementation of Multiple Constant Multiplications. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(11): 2695-2705 (2015) - [j23]Rui Fan, Ya Jun Yu, Yong Liang Guan:
Generalization of Orthogonal Frequency Division Multiplexing With Index Modulation. IEEE Trans. Wirel. Commun. 14(10): 5350-5359 (2015) - [c29]Wen Bin Ye, Ya Jun Yu:
An efficient FIR filtering technique for processing non-uniformly sampled signal. DSP 2015: 182-186 - [c28]Xin Lou, Ya Jun Yu:
Area-time efficient realization of multiple constant multiplication. ISCAS 2015: 962-965 - [c27]Xin Lou, Pramod Kumar Meher, Ya Jun Yu:
Fine-grained pipelining for multiple constant multiplications. ISCAS 2015: 966-969 - [c26]Wen Bin Ye, Xin Lou, Ya Jun Yu:
Design of high-speed multiplierless linear-phase FIR filters. ISCAS 2015: 2964-2967 - 2014
- [j22]Wei Jing Xu, Ya Jun Yu, Håkan Johansson:
Improved Filter Bank Approach for the Design of Variable Bandedge and Fractional Delay Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(3): 764-777 (2014) - [j21]Wen Bin Ye, Ya Jun Yu:
Bit-Level Multiplierless FIR Filter Optimization Incorporating Sparse Filter Technique. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(11): 3206-3215 (2014) - [c25]Rui Fan, Ya Jun Yu, Yong Liang Guan:
Orthogonal frequency division multiplexing with generalized index modulation. GLOBECOM 2014: 3880-3885 - [c24]Wen Bin Ye, Ya Jun Yu:
A polynomial-time algorithm for the design of multiplierless linear-phase FIR filters with low hardware cost. ISCAS 2014: 970-973 - [c23]Xin Lou, Ya Jun Yu, Pramod Kumar Meher:
High-speed multiplier block design based on bit-level critical path optimization. ISCAS 2014: 1308-1311 - 2013
- [j20]Ya Jun Yu, Wei Jing Xu:
Investigation on the Optimization Criteria for the Design of Variable Fractional Delay Filters. IEEE Trans. Circuits Syst. II Express Briefs 60-II(8): 522-526 (2013) - [j19]Wen Bin Ye, Ya Jun Yu:
Single-Stage and Cascade Design of High Order Multiplierless Linear Phase FIR Filters Using Genetic Algorithm. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(11): 2987-2997 (2013) - [c22]Heng Zhao, Wen Bin Ye, Ya Jun Yu:
Sparse FIR filter design based on Genetic Algorithm. ISCAS 2013: 97-100 - 2012
- [j18]Ya Jun Yu, Wei Jing Xu:
Mixed-Radix Fast Filter Bank Approach for the Design of Variable Digital Filters With Simultaneously Tunable Bandedge and Fractional Delay. IEEE Trans. Signal Process. 60(1): 100-111 (2012) - [j17]Sang Yoon Park, Ya Jun Yu:
Fixed-Point Analysis and Parameter Selections of MSR-CORDIC With Applications to FFT Designs. IEEE Trans. Signal Process. 60(12): 6245-6256 (2012) - [c21]Wen Bin Ye, Ya Jun Yu:
Design of high order and wide coefficient wordlength multiplierless FIR filters with low hardware cost using genetic algorithm. ISCAS 2012: 45-48 - 2011
- [j16]Dong Shi, Ya Jun Yu:
Design of Linear Phase FIR Filters With High Probability of Achieving Minimum Number of Adders. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(1): 126-136 (2011) - [j15]Robert Bregovic, Ya Jun Yu, Tapio Saramäki, Yong Ching Lim:
Implementation of Linear-Phase FIR Filters for a Rational Sampling-Rate Conversion Utilizing the Coefficient Symmetry. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(3): 548-561 (2011) - [j14]Dong Shi, Ya Jun Yu:
Design of Discrete-Valued Linear Phase FIR Filters in Cascade Form. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(7): 1627-1636 (2011) - [c20]Ya Jun Yu:
Design of variable bandedge FIR filters with extremely large bandedge variation range. ISCAS 2011: 141-144 - [c19]Wen Bin Ye, Ya Jun Yu:
Switching activity analysis and power estimation for multiple constant multiplier block of FIR filters. ISCAS 2011: 145-148 - 2010
- [j13]Yong Lian, Ya Jun Yu:
Guest Editorial: Low-Power Digital Filter Design Techniques and Their Applications. Circuits Syst. Signal Process. 29(1): 1-5 (2010) - [j12]Ya Jun Yu, Yong Ching Lim:
Optimization of Linear Phase FIR Filters in Dynamically Expanding Subexpression Space. Circuits Syst. Signal Process. 29(1): 65-80 (2010) - [j11]Robert Bregovic, Ya Jun Yu, Ari Viholainen, Yong Ching Lim:
Implementation of Linear-Phase FIR Nearly Perfect Reconstruction Cosine-Modulated Filterbanks Utilizing the Coefficient Symmetry. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(1): 139-151 (2010) - [c18]Dong Shi, Ya Jun Yu:
Low-complexity linear phase fir filters in cascade form. ISCAS 2010: 177-180 - [c17]Wei Jing Xu, Ya Jun Yu:
Polynomial implementation structure for lagrange-type variable fractional delay filters. ISCAS 2010: 733-736 - [c16]Pinping Sun, Guoan Wang, Wayne H. Woods, Hailing Wang, Ya Jun Yu:
An adaptive body-bias low voltage low power LC VCO. ISCAS 2010: 1121-1124
2000 – 2009
- 2009
- [j10]Ya Jun Yu, Dong Shi, Yong Ching Lim:
Design of Extrapolated Impulse Response FIR Filters With Residual Compensation in Subexpression Space. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(12): 2621-2633 (2009) - [j9]Ya Jun Yu, Yong Ching Lim, Dong Shi:
Low-Complexity Design of Variable Bandedge Linear Phase FIR Filters With Sharp Transition Band. IEEE Trans. Signal Process. 57(4): 1328-1338 (2009) - [c15]Ya Jun Yu, Dong Shi, Robert Bregovic:
On the Complexity Reduction of Polyphase Linear Phase FIR Filters with Symmetric Coefficient Implementation. ISCAS 2009: 277-280 - 2008
- [c14]Ya Jun Yu, Dong Shi, Yong Ching Lim:
Subexpression encoded extrapolated impulse response FIR filter with perfect residual compensation. ISCAS 2008: 2446-2449 - 2007
- [j8]Ya Jun Yu, Yong Ching Lim:
Design of Linear Phase FIR Filters in Subexpression Space Using Mixed Integer Linear Programming. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(10): 2330-2338 (2007) - [j7]Ya Jun Yu, Yong Ching Lim:
Roundoff Noise Analysis of Signals Represented Using Signed Power-of-Two Terms. IEEE Trans. Signal Process. 55(5-2): 2122-2135 (2007) - [j6]Yong Ching Lim, Ya Jun Yu, Kok Lay Teo, Tapio Saramäki:
FRM-Based FIR Filters With Optimum Finite Word-Length Performance. IEEE Trans. Signal Process. 55(6-2): 2914-2924 (2007) - [c13]Ya Jun Yu, Yong Ching Lim:
Roundoff Noise Analysis for FSK Signals in White Noise Represented as Signed Power-of-Two Numbers. ICECS 2007: 796-799 - [c12]Yong Ching Lim, Ya Jun Yu, Kok Lay Teo, Tapio Saramäki:
FRM-Based FIR Filters with Minimum Coefficient Sensitivities. ISCAS 2007: 2962-2965 - 2006
- [c11]Ya Jun Yu, Yong Ching Lim:
Roundoff noise analysis of signals represented using signed power-of-two terms. EUSIPCO 2006: 1-4 - [c10]Robert Bregovic, Tapio Saramäki, Ya Jun Yu, Yong Ching Lim:
An efficient implementation of linear-phase FIR filters for a rational sampling rate conversion. ISCAS 2006 - 2005
- [j5]Ya Jun Yu, Kok Lay Teo, Yong Ching Lim, G. H. Zhao:
Extrapolated impulse response filter and its application in the synthesis of digital filters using the frequency-response masking technique. Signal Process. 85(3): 581-590 (2005) - [j4]Yong Ching Lim, Ya Jun Yu, Tapio Saramäki:
Optimum masking levels and coefficient sparseness for Hilbert transformers and half-band filters designed using the frequency-response masking technique. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(11): 2444-2453 (2005) - [j3]Yong Ching Lim, Ya Jun Yu:
Synthesis of very sharp Hilbert transformer using the frequency-response masking technique. IEEE Trans. Signal Process. 53(7): 2595-2597 (2005) - [c9]Ya Jun Yu, Yong Ching Lim:
Signed power-of-two allocation scheme for the design of lattice orthogonal filter banks. ISCAS (2) 2005: 1819-1822 - 2004
- [c8]Ya Jun Yu, Yong Ching Lim, Kok Lay Teo, Guohui Zhao:
Frequency-response-masking technique incorporating extrapolated impulse response band-edge shaping filter. ISCAS (5) 2004: 532-535 - [c7]Juha Yli-Kaakinen, Tapio Saramäki, Ya Jun Yu:
An efficient algorithm for the optimization of FIR filters synthesized using the multistage frequency-response masking approach. ISCAS (5) 2004: 540-543 - 2003
- [j2]Yong Ching Lim, Ya Jun Yu:
A width-recursive depth-first tree search approach for the design of discrete coefficient perfect reconstruction lattice filter bank. IEEE Trans. Circuits Syst. II Express Briefs 50(6): 257-266 (2003) - [c6]Ya Jun Yu, Tapio Saramäki, Yong Ching Lim:
An iterative method for optimizing FIR filters synthesized using the two-stage frequency-response masking technique. ISCAS (3) 2003: 874-877 - 2002
- [j1]Yong Ching Lim, Y. Sun, Ya Jun Yu:
Design of discrete-coefficient FIR filters on loosely connected parallel machines. IEEE Trans. Signal Process. 50(6): 1409-1416 (2002) - [c5]Ya Jun Yu, Yong Ching Lim:
Genetic algorithm approach for the optimization of multiplierless sub-filters generated by the frequency-response masking technique. ICECS 2002: 1163-1166 - [c4]Ya Jun Yu, Yong Ching Lim:
FRM based FIR filter design - the WLS approach. ISCAS (3) 2002: 221-224 - 2001
- [c3]Ya Jun Yu, Yong Ching Lim:
New natural selection process and chromosome encoding for the design of multiplierless lattice QMF using genetic algorithm. ICECS 2001: 1273-1276 - [c2]Yong Ching Lim, Ya Jun Yu, H. Q. Zheng, S. W. Foo:
FPGA implementation of digital filters synthesized using the frequency-response masking technique. ISCAS (2) 2001: 173-176 - 2000
- [c1]Yong Ching Lim, Ya Jun Yu:
A successive reoptimization approach for the design of discrete coefficient perfect reconstruction lattice filter bank. ISCAS 2000: 69-72
Coauthor Index
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