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Shohei Ikehara

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1990 – 1999

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1995
[j2]
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  - https://dblp.org/rec/journals/scjapan/YamashitaI95
Koichi Yamashita, Shohei Ikehara:
A study of network logic for wafer-scale parallel-access memory and a yield analysis. Syst. Comput. Jpn. 26(2): 1-9 (1995)
1992
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Koichi Yamashita, Shohei Ikehara:
A Design and Yield Evaluation Technique for Wafer-Scale Memory. Computer 25(4): 19-27 (1992)

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