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Journal Articles
- 2015
[j3]Wei Chang, Chun-Hsing Shih, Yan-Xiang Luo
, Wen-Fa Wu, Chen-Hsin Lien:
Reliability impacts of high-speed 3-bit/cell Schottky barrier nanowire charge-trapping memories. Microelectron. Reliab. 55(1): 74-80 (2015)- 2013
- [j2]Meng-Fan Chang, Shyh-Shyuan Sheu, Ku-Feng Lin, Che-Wei Wu, Chia-Chen Kuo, Pi-Feng Chiu, Yih-Shan Yang, Yu-Sheng Chen, Heng-Yuan Lee, Chen-Hsin Lien, Frederick T. Chen, Keng-Li Su, Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai:
A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes. IEEE J. Solid State Circuits 48(3): 878-891 (2013) - 2004
- [j1]Chun-Hsing Shih, Yi-Min Chen, Chen-Hsin Lien:
Design strategy of localized halo profile for achieving sub-50 nm bulk MOSFET. Microelectron. Reliab. 44(7): 1069-1075 (2004)
Conference and Workshop Papers
- 2015
- [c3]Tzu-Cheng Kao, Chen-Hsin Lien, Chien-Wei Chiu, Jian-Hsing Lee, Yen-Hsiang Lo, Chung-Yu Hung, Tsung-Yi Huang, Hung-Der Su:
Robust ESD self-protected LDNMOSFET by an enhanced displacement-current triggering. IRPS 2015: 5 - [c2]Tzu-Cheng Kao, Jian-Hsing Lee, Chen-Hsin Lien, Chih-Hsien Wang, Kuang-Cheng Tai, Hung-Der Su:
Enhanced CDM-robustness for the packaged IC with the extra bonding wire to the die-attach plate. IRPS 2015: 6 - 2011
- [c1]Shyh-Shyuan Sheu, Meng-Fan Chang, Ku-Feng Lin, Che-Wei Wu, Yu-Sheng Chen, Pi-Feng Chiu, Chia-Chen Kuo, Yih-Shan Yang, Pei-Chia Chiang, Wen-Pin Lin, Che-He Lin, Heng-Yuan Lee, Peiyi Gu, Sumin Wang, Frederick T. Chen, Keng-Li Su, Chen-Hsin Lien, Kuo-Hsing Cheng, Hsin-Tun Wu, Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai:
A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability. ISSCC 2011: 200-202
Coauthor Index
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