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Mahmoud Fawzy Wagdy
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2010 – 2019
- 2015
- [c8]Mahmoud Fawzy Wagdy, Sanjay Subba Rao, Krishna Kant Singh, Ghada H. Ibrahim:
An 8-PSK receiver using an integrated low-noise amplifier & super-regenerative oscillator with digital detection technique. ICECS 2015: 416-420 - 2013
- [c7]Mahmoud Fawzy Wagdy, Sandesh Maraliga Jayaram:
A Novel Flash Fast-Locking Digital PLL: Verilog-AMS Modeling and Simulations. ITNG 2013: 217-222 - 2012
- [c6]Mahmoud Fawzy Wagdy, Robin Sur:
A Novel SAR Fast-Locking Digital PLL: SPICE Modeling and Simulations. ITNG 2012: 472-477 - 2011
- [c5]Mahmoud Fawzy Wagdy, Anurag Nannaka, Rajeev K. N. Channegowda:
A Novel Flash Fast-Locking Digital PLL: VHDL-AMS and Matlab/Simulink Modeling and Simulations. ITNG 2011: 777-784
2000 – 2009
- 2009
- [j1]Mahmoud Fawzy Wagdy, Brandon Casey Cabrales:
A novel flash fast-locking digital phase-locked loop: design and simulations. IET Circuits Devices Syst. 3(5): 280-290 (2009) - [c4]Mahmoud Fawzy Wagdy, Brandon Casey Cabrales:
A Novel Flash Fast-Locking Digital Phase-Locked Loop. ITNG 2009: 47-52 - 2006
- [c3]Shilpa Ambarish, Mahmoud Fawzy Wagdy:
A Wide-Band Digital Phase-Locked Looop. ITNG 2006: 597-598 - [c2]Haripriya Janardhan, Mahmoud Fawzy Wagdy:
Design of a 1GHz Digital PLL Using 0.18\mu m CMOS Technology. ITNG 2006: 599-600 - [c1]Mahmoud Fawzy Wagdy, Srishti Vaishnava:
A Fast-Locking Digital Phase-Locked Loop. ITNG 2006: 742-746
Coauthor Index
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