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ORCIDChen Huang 0005
Person information
- affiliation (PhD 2012): University of California Riverside, CA, USA
Other persons with the same name
- Chen Huang — disambiguation page
- Chen Huang 0001
![[0000-0002-4978-493X]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-4978-493X")
— Apple Inc., Cupertino, CA, USA (and 3 more) - Chen Huang 0002 — University at Buffalo, Center of Excellence for Document Analysis and Recognition (CEDAR), NY, USA
- Chen Huang 0003 — Huazhong University of Science and Technology, Department of EIE, Wuhan, China
- Chen Huang 0004 — Purple Mountain Laboratories, Pervasive Communication Research Center, Nanjing, China (and 2 more)
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Books and Theses
- 2012
[b1]Chen Huang:
Synthesis of Custom Networks of Processing Elements Onto Field-Programmable Gate Arrays for Physical System Emulation. University of California, Riverside, USA, 2012
Journal Articles
- 2013
- [j4]Chen Huang, Frank Vahid, Tony Givargis:
Automatic synthesis of physical system differential equation models to a custom network of general processing elements on FPGAs. ACM Trans. Embed. Comput. Syst. 13(2): 23:1-23:27 (2013) - [j3]Chen Huang, Bailey Miller, Frank Vahid, Tony Givargis:
Synthesis of networks of custom processing elements for real-time physical system emulation. ACM Trans. Design Autom. Electr. Syst. 18(2): 21:1-21:21 (2013) - 2011
- [j2]Chen Huang, Frank Vahid, Tony Givargis:
A Custom FPGA Processor for Physical Model Ordinary Differential Equation Solving. IEEE Embed. Syst. Lett. 3(4): 113-116 (2011) - 2009
- [j1]Scott Sirowy, Chen Huang, Frank Vahid:
Dynamic acceleration management for SystemC emulation. SIGBED Rev. 6(3): 3 (2009)
Conference and Workshop Papers
- 2013
- [c8]Ting-Shuo Chou, Tony Givargis, Chen Huang, Bailey Miller, Frank Vahid:
An efficient compression scheme for checkpointing of FPGA-based digital mockups. ASP-DAC 2013: 632-637 - 2012
- [c7]Chen Huang, Bailey Miller, Frank Vahid, Tony Givargis:
Synthesis of custom networks of heterogeneous processing elements for complex physical system emulation. CODES+ISSS 2012: 215-224 - 2011
- [c6]Chen Huang, Frank Vahid:
Scalable object detection accelerators on FPGAs using custom design space exploration. SASP 2011: 115-121 - 2010
- [c5]Scott Sirowy, Chen Huang, Frank Vahid:
Online SystemC emulation acceleration. DAC 2010: 30-35 - [c4]Chen Huang, Frank Vahid:
Server-side coprocessor updating for mobile devices with FPGAs. FPGA 2010: 125-134 - 2009
- [c3]Chen Huang, Frank Vahid:
Transmuting coprocessors: dynamic loading of FPGA coprocessors. DAC 2009: 848-851 - 2008
- [c2]Chen Huang, Frank Vahid:
Dynamic coprocessor management for FPGA-enhanced compute platforms. CASES 2008: 71-78 - [c1]Chen Huang, David Sheldon, Frank Vahid:
Dynamic tuning of configurable architectures: the AWW online algorithm. CODES+ISSS 2008: 97-102
Coauthor Index
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