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ORCIDJihyun Cho
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2010 – 2019
- 2018
[j7]Sung-Yun Park
, Jihyun Cho, Kyounghwan Na, Euisik Yoon:
Modular 128-Channel Δ-ΔΣ Analog Front-End Architecture Using Spectrum Equalization Scheme for 1024-Channel 3-D Neural Recording Microsystems. IEEE J. Solid State Circuits 53(2): 501-514 (2018)- [j6]Sung-Yun Park, Jihyun Cho, Kyuseok Lee, Euisik Yoon:
Dynamic Power Reduction in Scalable Neural Recording Interface Using Spatiotemporal Correlation and Temporal Sparsity of Neural Signals. IEEE J. Solid State Circuits 53(4): 1102-1114 (2018) - 2016
- [j5]Adam E. Mendrela, Jihyun Cho, Jeffrey A. Fredenburg, Vivek Nagaraj, Theoden I. Netoff, Michael P. Flynn, Euisik Yoon:
A Bidirectional Neural Interface Circuit With Active Stimulation Artifact Cancellation and Cross-Channel Common-Mode Noise Suppression. IEEE J. Solid State Circuits 51(4): 955-965 (2016) - 2015
- [j4]Jaehyuk Choi, Seokjun Park, Jihyun Cho, Euisik Yoon:
An Energy/Illumination-Adaptive CMOS Image Sensor With Reconfigurable Modes of Operations. IEEE J. Solid State Circuits 50(6): 1438-1450 (2015) - [j3]Sung-Yun Park, Jihyun Cho, Kyuseok Lee, Euisik Yoon:
A PWM Buck Converter With Load-Adaptive Power Transistor Scaling Scheme Using Analog-Digital Hybrid Control for High Energy Efficiency in Implantable Biomedical Systems. IEEE Trans. Biomed. Circuits Syst. 9(6): 885-895 (2015) - [c8]Sung-Yun Park, Jihyun Cho, Kyuseok Lee, Euisik Yoon:
12.3 PWM buck converter with >80% PCE in 45μA-to-4mA loads using analog-digital hybrid control for impiantale biomedical systems. ISSCC 2015: 1-3 - [c7]Adam E. Mendrela, Jihyun Cho, Jeffrey A. Fredenburg, Cynthia A. Chestek, Michael P. Flynn, Euisik Yoon:
Enabling closed-loop neural interface: A bi-directional interface circuit with stimulation artifact cancellation and cross-channel CM noise suppression. VLSIC 2015: 108- - [c6]Sung-Yun Park, Jihyun Cho, Kyounghwan Na, Euisik Yoon:
Toward 1024-channel parallel neural recording: Modular Δ-ΔΣ analog front-end architecture with 4.84fJ/C-s·mm2 energy-area product. VLSIC 2015: 112- - 2014
- [j2]Jaehyuk Choi, Seokjun Park, Jihyun Cho, Euisik Yoon:
A 3.4-µW Object-Adaptive CMOS Image Sensor With Embedded Feature Extraction Algorithm for Motion-Triggered Object-of-Interest Imaging. IEEE J. Solid State Circuits 49(1): 289-300 (2014) - [j1]Jihyun Cho, Jaehyuk Choi, Seong-Jin Kim, Seokjun Park, Jungsoon Shin, James D. K. Kim, Euisik Yoon:
A 3-D Camera With Adaptable Background Light Suppression Using Pixel-Binning and Super-Resolution. IEEE J. Solid State Circuits 49(10): 2319-2332 (2014) - [c5]Seokjun Park, Jihyun Cho, Kyuseok Lee, Euisik Yoon:
7.2 243.3pJ/pixel bio-inspired time-stamp-based 2D optic flow sensor for artificial compound eyes. ISSCC 2014: 126-127 - 2013
- [c4]Jaehyuk Choi, Seokjun Park, Jihyun Cho, Euisik Yoon:
A 3.4µW CMOS image sensor with embedded feature-extraction algorithm for motion-triggered object-of-interest imaging. ISSCC 2013: 478-479 - 2012
- [c3]Jaehyuk Choi, Seokjun Park, Jihyun Cho, Euisik Yoon:
A 1.36μW adaptive CMOS image sensor with reconfigurable modes of operation from available energy/illumination for distributed wireless sensor network. ISSCC 2012: 112-114
2000 – 2009
- 2008
- [c2]Dongsoo Kim, Jihyun Cho, Seunghyun Lim, Dongmyung Lee, Gunhee Han:
A 5000S/s Single-Chip Smart Eye-Tracking Sensor. ISSCC 2008: 46-47 - 2006
- [c1]Seogheon Ham, Yonghee Lee, Wunki Jung, Seunghyun Lim, Kwisung Yoo, Youngcheol Chae, Jihyun Cho, Dongmyung Lee, Gunhee Han:
CMOS image sensor with analog gamma correction using nonlinear single-slope ADC. ISCAS 2006
Coauthor Index
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