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ORCIDMilan Vasilko
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2000 – 2009
- 2006
[c15]Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko:
Yield enhancements of design-specific FPGAs. FPGA 2006: 93-100- [c14]Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko:
Reconfiguration and Fine-Grained Redundancy for Fault Tolerance in FPGAs. FPL 2006: 1-6 - [c13]Piotr Stepien, Milan Vasilko:
On Feasibility of FPGA Bitstream Compression During Placement and Routing. FPL 2006: 1-4 - 2005
- [c12]Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko:
Analysis of yield loss due to random photolithographic defects in the interconnect structure of FPGAs. FPGA 2005: 138-148 - [c11]Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko:
Yield modelling and Yield Enhancement for FPGAs using Fault Tolerance Schemes. FPL 2005: 409-414 - 2004
- [c10]Nicola Campregher, Peter Y. K. Cheung, Milan Vasilko:
BIST Based Interconnect Fault Location for FPGAs. FPL 2004: 322-332 - 2002
- [c9]Tero Rissa, Milan Vasilko, Jarkko Niittylahti:
System-Level Modelling and Implementation Technique for Run-Time Reconfigurable Systems. FCCM 2002: 295-296 - 2001
- [c8]Milan Vasilko, Lukas Machácek, Marek Matej, Piotr Stepien, Steve Holloway:
A Rapid Prototyping Methodology and Platform for Seamless Communication Systems. IEEE International Workshop on Rapid System Prototyping 2001: 70-76 - 2000
- [b1]Milan Vasilko:
Design synthesis for dynamically reconfigurable logic systems. Bournemouth University, Poole, UK, 2000 - [c7]Milan Vasilko:
Design Visualisation for Dynamically Reconfigurable Systems. FPL 2000: 131-140 - [c6]Milan Vasilko, Graham Benyon-Tinker:
Automatic Temporal Floorplanning with Guaranteed Solution Feasibility. FPL 2000: 656-664
1990 – 1999
- 1999
- [c5]Milan Vasilko, David Cabanis:
Improving Simulation Accuracy in Design Methodologies for Dynamically Reconfigurable Logic Systems. FCCM 1999: 123- - [c4]Milan Vasilko:
DYNASTY: A Temporal Floorplanning Based CAD Framework for Dynamically Reconfigurable Logic Systems. FPL 1999: 124-133 - 1998
- [c3]Milan Vasilko, D. Long:
RIFLE-62: A Flexible Environment for Prototyping Dynamically Reconfigurable Systems. International Workshop on Rapid System Prototyping 1998: 130-135 - 1996
- [c2]Milan Vasilko, Djamel Ait-Boudaoud:
Optically Reconfigurable FPGAs: Is this a Future Trend? FPL 1996: 270-279 - [c1]Milan Vasilko, Djamel Ait-Boudaoud:
Architectural Synthesis Techniques for Dynamically Reconfigurable Logic. FPL 1996: 290-296
Coauthor Index
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