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ORCIDAndreas Wortmann 0002
Person information
- affiliation: City University of Applied Sciences, Bremen, Germany
Other persons with the same name
- Andreas Wortmann 0001
![[0000-0003-3534-253X]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0003-3534-253X")
— University of Stuttgart, ISW, Germany (and 1 more)
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Journal Articles
- 2006
[j1]Matthias Müller, Sven Simon, Holger Gryska, Andreas Wortmann, Steffen Buch:
Low power synthesizable register files for processor and IP cores. Integr. 39(2): 131-155 (2006)
Conference and Workshop Papers
- 2004
- [c6]Andreas Wortmann, Sven Simon, Matthias Müller:
A High-Speed Transceiver Architecture Implementable as Synthesizable IP Core. DATE 2004: 46-51 - [c5]Sven Simon, Matthias Müller, Holger Gryska, Andreas Wortmann, Steffen Buch:
An instruction set for the efficient implementation of the CORDIC algorithm. ISCAS (2) 2004: 357-360 - [c4]Matthias Müller, Andreas Wortmann, Sven Simon, Michael Kugel, Tim Schoenauer:
The impact of clock gating schemes on the power dissipation of synthesizable register files. ISCAS (2) 2004: 609-612 - [c3]Matthias Müller, Andreas Wortmann, Dominik Mader, Sven Simon:
Register Isolation for Synthesizable Register Files. PATMOS 2004: 228-237 - 2003
- [c2]Marek Wróblewski, Matthias Müller, Andreas Wortmann, Sven Simon, Wilhelm Pieper, Josef A. Nossek:
A power efficient register file architecture using master latch sharing. ISCAS (5) 2003: 393-396 - 2002
- [c1]Matthias Müller, Andreas Wortmann, Sven Simon, S. Wolter, Steffen Buch, Marek Wróblewski, Josef A. Nossek:
Low power register file architecture for application specific DSPs. ISCAS (4) 2002: 89-92
Coauthor Index
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