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ORCIDGert Slavenburg
Person information
- affiliation: NVIDIA
- affiliation (former): Philips Semiconductors / Philips Research
- affiliation (former): University of Twente, The Netherlands
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2000 – 2009
- 2005
[c7]Jan-Willem van de Waerdt, Gerrit A. Slavenburg, Jean-Paul van Itegem, Stamatis Vassiliadis:
Motion estimation performance of the TM3270 processor. SAC 2005: 850-856
1990 – 1999
- 1998
- [j3]Selliah Rathnam, Gert Slavenburg:
Processing the new world of interactive media. IEEE Signal Process. Mag. 15(2): 108-117 (1998) - [c6]Frans Sijstermans, Evert-Jan D. Pol, Bram Riemens, Kees A. Vissers, Selliah Rathnam, Gert Slavenburg:
Design space exploration for future TriMedia CPUs. ICASSP 1998: 3137-3140 - 1996
- [c5]Selliah Rathnam, Gert Slavenburg:
An Architectural Overview of the Programmable Multimedia Processor, TM-1. COMPCON 1996: 319-326 - 1994
- [c4]Andrew S. Huang, Gert Slavenburg, John Paul Shen:
Speculative Disambiguation: A Compilation Technique for Dynamic Memory Disambiguation. ISCA 1994: 200-210 - 1990
- [c3]Junien Labrousse, Gerrit A. Slavenburg:
CREATE-LIFE: a modular design approach for high performance ASICs. Compcon 1990: 427-433
1980 – 1989
- 1988
- [j2]David R. Cheriton, Patrick D. Boyle, Gert Slavenburg:
Comments on "'Coherency for multiprocessor virtual addresses caches' by James R. Goodman". SIGARCH Comput. Archit. News 16(3): 3-6 (1988) - [c2]Junien Labrousse, Gerrit A. Slavenburg:
CREATE-LIFE: a design system for high performances VLSI circuits. ICCD 1988: 356-360 - 1986
- [c1]David R. Cheriton, Gert Slavenburg, Patrick D. Boyle:
Software-Controlled Caches in the VMP Multiprocessor. ISCA 1986: 366-374
1970 – 1979
- 1979
- [j1]Jan L. A. van de Snepscheut, Gert Slavenburg:
Introducing the notion of processes to hardware. SIGARCH Comput. Archit. News 7(7): 13-23 (1979)
Coauthor Index
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