default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDChia Yee Ooi
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2022
[j18]Tariq Ibrahim Al-Shwaheen
, Mehrdad Moghbel, Yuan Wen Hau, Chia Yee Ooi:
Use of learning approaches to predict clinical deterioration in patients based on various variables: a review of the literature. Artif. Intell. Rev. 55(2): 1055-1084 (2022)- [j17]Chong Yeam Tan, Chia Yee Ooi, Hau Sim Choo, Nordinah Ismail:
Efficient hardware-accelerated pseudoinverse computation through algorithm restructuring for parallelization in high-level synthesis. Int. J. Circuit Theory Appl. 50(2): 394-416 (2022) - [j16]Tze Hon Tan, Chia Yee Ooi, Muhammad Nadzir Marsono:
RtFog: A Real-Time FPGA-Based Fog Node With Remote Dynamically Reconfigurable Application Plane for Fog Analytics Redeployment. IEEE Trans. Green Commun. Netw. 6(1): 341-351 (2022) - [c26]Tze Hon Tan, Chia Yee Ooi, Muhammad N. Marsono:
An FPGA-based IP Core Subscription-Oriented Fog Computing Platform. IPDPS Workshops 2022: 128-131 - 2021
- [c25]Tze Hon Tan, Chia Yee Ooi, Muhammad N. Marsono:
An FPGA-based Middlebox with Remote Dynamically Reconfigurable Application Plane. TENCON 2021: 52-56 - 2020
- [j15]Mehrdad Moghbel, Chia Yee Ooi, Nordinah Ismail, Yuan Wen Hau, Nogol Memari:
A review of breast boundary and pectoral muscle segmentation methods in computer-aided detection/diagnosis of breast mammography. Artif. Intell. Rev. 53(3): 1873-1918 (2020) - [j14]Hau Sim Choo, Chia Yee Ooi, Michiko Inoue, Nordinah Ismail, Mehrdad Moghbel, Chee Hoo Kok:
Register-Transfer-Level Features for Machine-Learning-Based Hardware Trojan Detection. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 103-A(2): 502-509 (2020)
2010 – 2019
- 2019
- [c24]Hau Sim Choo, Chia Yee Ooi, Michiko Inoue, Nordinah Ismail, Mehrdad Moghbel, Sreedharan Baskara Dass, Chee Hoo Kok, Fawnizu Azmadi Hussin:
Machine-Learning-Based Multiple Abstraction-Level Detection of Hardware Trojan Inserted at Register-Transfer Level. ATS 2019: 98 - [c23]Chee Hoo Kok, Chia Yee Ooi, Michiko Inoue, Mehrdad Moghbel, Sreedharan Baskara Dass, Hau Sim Choo, Nordinah Ismail, Fawnizu Azmadi Hussin:
Net Classification Based on Testability and Netlist Structural Features for Hardware Trojan Detection. ATS 2019: 105-110 - [c22]Pyi Phyo Aung, Koichiro Mashiko, Nordinah Binti Ismail, Chia Yee Ooi:
Evaluation of SRAM PUF Characteristics and Generation of Stable Bits for IoT Security. IRICT 2019: 441-450 - [c21]Chee Hoo Kok, Chia Yee Ooi, Mehrdad Moghbel, Nordinah Ismail, Hau Sim Choo, Michiko Inoue:
Classification of Trojan Nets Based on SCOAP Values using Supervised Learning. ISCAS 2019: 1-5 - [c20]Chong Yeam Tan, Chia Yee Ooi, Nordinah Ismail:
Loop Optimizations of MGS-QRD Algorithm for FPGA High-Level Synthesis. SoCC 2019: 138-143 - 2018
- [c19]Tze Hon Tan, Chia Yee Ooi, Muhammad Nadzir Marsono:
drDRM: A PUF-Based Dynamically Reconfigurable DRM Mechanism for FPGA-Based Platform. CANDAR 2018: 194-200 - 2017
- [j13]Mahshid Mojtabavi Naeini, Sreedharan Baskara Dass, Chia Yee Ooi, Tomokazu Yoneda, Michiko Inoue:
An integrated DFT solution for power reduction in scan test applications by low power gating scan cell. Integr. 57: 108-124 (2017) - [j12]Jeevan Sirkunan, Chia Yee Ooi, Nasir Shaikh-Husin, Yuan Wen Hau, Muhammad N. Marsono:
Hardware transactional memory architecture with adaptive version management for multi-processor FPGA platforms. J. Syst. Archit. 73: 42-52 (2017) - [j11]Alireza Monemi, Chia Yee Ooi, Maurizio Palesi, Muhammad N. Marsono:
Ping-lock round robin arbiter. Microelectron. J. 63: 81-93 (2017) - [c18]Tze Hon Tan, Chia Yee Ooi, Muhammad Nadzir Marsono:
hpFog: A FPGA-Based Fog Computing Platform. NAS 2017: 1-2 - 2016
- [c17]Tze Hon Tan, Chia Yee Ooi, Muhammad N. Marsono:
A modular architecture for dynamically reconfigurable middlebox with customized reconfiguration handler. FPT 2016: 225-228 - [c16]Nurita Mohamad, Chia Yee Ooi, Nordinah Bt Ismail, Jwing Teh:
SVA checker generator for FPGA-based verification platform. ISCAS 2016: 1750-1753 - [c15]Ayub Chin Abdullah, Chia Yee Ooi, Nordinah Bt Ismail, Nurita Binti Mohammad:
Power-aware through-silicon-via minimization by partitioning finite state machine with datapath. ISCAS 2016: 1942-1945 - [c14]Alireza Monemi, Chia Yee Ooi, Muhammad Nadzir Marsono, Maurizio Palesi:
Improved Flow Control for Minimal Fully Adaptive Routing in 2D Mesh NoC. NoCArc@MICRO 2016: 9-14 - 2015
- [j10]Mahdieh Nadi Senejani, Mahdiar Hosein Ghadiry, Chia Yee Ooi, Muhammad Nadzir Marsono:
Built-in Self Test Power and Test Time Analysis in On-chip Networks. Circuits Syst. Signal Process. 34(4): 1057-1075 (2015) - [j9]Alireza Monemi, Chia Yee Ooi, Muhammad Nadzir Marsono:
Low Latency Network-on-Chip Router Microarchitecture Using Request Masking Technique. Int. J. Reconfigurable Comput. 2015: 570836:1-570836:13 (2015) - [j8]Mahshid Mojtabavi Naeini, Chia Yee Ooi:
A Novel Scan Architecture for Low Power Scan-Based Testing. VLSI Design 2015: 264071:1-264071:13 (2015) - [c13]Jeevan Sirkunan, Chia Yee Ooi, Muhammad N. Shaikh-Husin, Yuan Wen Hau, Muhammad N. Marsono:
Adaptive Configurable Transactional Memory for Multi-processor FPGA Platforms. FCCM 2015: 102 - [c12]Alireza Monemi, Chia Yee Ooi, Muhammad Nadzir Marsono:
Virtual Channel and Switch Allocation for Low Latency Network-on-Chip Routers. FCCM 2015: 234 - [c11]Tze Hon Tan, Chia Yee Ooi, Muhammad N. Marsono:
rrBox: A remote dynamically reconfigurable network processing middlebox. FPL 2015: 1-4 - 2014
- [j7]Hasliza Hassan, Chia Yee Ooi:
Thermal Model with Metal Consideration for System-on-Chip Testing. J. Low Power Electron. 10(3): 325-333 (2014) - [c10]Tze Hon Tan, Chia Yee Ooi, Muhammad N. Marsono:
rrBox: A Remote Dynamically Reconfigurable Middlebox for Network Protection. CANDAR 2014: 219-225 - [c9]Tze Hon Tan, Chia Yee Ooi, Yuan Wen Hau, Nasir Shaikh-Husin, Muhammad N. Marsono:
Remote dynamically reconfigurable platform using NetFPGA. ISCAS 2014: 1239-1242 - [c8]Ling Kim Loo, Chia Yee Ooi, V. Y. Liew, Yuan Wen Hau, Muhammad N. Marsono:
Packet logging mechanism for adaptive online fault detection on Network-on-Chip. ISCAS 2014: 1760-1763 - [c7]Jeevan Sirkunan, Chia Yee Ooi, Nasir Shaikh-Husin, Yuan Wen Hau, Muhammad Nadzir Marsono:
Hardware transactional memory on multi-processor FPGA platform. ISCAS 2014: 2744-2747 - [c6]Tze Hon Tan, Chia Yee Ooi, Muhammad N. Marsono:
rrBox: Remote dynamically reconfigurable middlebox using NetFPGA. ISCIT 2014: 409-413 - 2013
- [j6]Mahdieh Nadi Senjani, Mahdiar Hosein Ghadiry, Chia Yee Ooi, Muhammad N. Marsono:
A Semi-Analytical Approach to Study the Energy Consumption of On-Chip Networks Testing. J. Low Power Electron. 9(2): 189-197 (2013) - [c5]Sieng Wong, Chia Yee Ooi, Yuan Wen Hau, Muhammad N. Marsono, Nasir Shaikh-Husin:
Feasible transition path generation for EFSM-based system testing. ISCAS 2013: 1724-1727 - 2012
- [j5]Chia Yee Ooi, Jia Pao Sua, Siaw Chen Lee:
Power-aware system-on-chip test scheduling using enhanced rectangle packing algorithm. Comput. Electr. Eng. 38(6): 1444-1455 (2012) - 2011
- [j4]Chia Yee Ooi, Hideo Fujiwara:
A New Design-for-Testability Method Based on Thru-Testability. J. Electron. Test. 27(5): 583-598 (2011) - [c4]Yuan Wen Hau, Muhammad N. Marsono, Chia Yee Ooi, Mohamed Khalil Hani:
A Network-on-Chip simulation framework for homogeneous Multi-Processor System-on-Chip. ASICON 2011: 175-179
2000 – 2009
- 2008
- [j3]Hideo Fujiwara, Hiroyuki Iwata, Tomokazu Yoneda, Chia Yee Ooi:
A Nonscan Design-for-Testability Method for Register-Transfer-Level Circuits to Guarantee Linear-Depth Time Expansion Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(9): 1535-1544 (2008) - 2007
- [j2]Chia Yee Ooi, Thomas Clouqueur, Hideo Fujiwara:
Analysis of Test Generation Complexity for Stuck-At and Path Delay Faults Based on tauk-Notation. IEICE Trans. Inf. Syst. 90-D(8): 1202-1212 (2007) - 2006
- [c3]Chia Yee Ooi, Hideo Fujiwara:
A New Scan Design Technique Based on Pre-Synthesis Thru Functions. ATS 2006: 163-168 - [c2]Chia Yee Ooi, Hideo Fujiwara:
A New Class of Sequential Circuits with Acyclic Test Generation Complexity. ICCD 2006: 425-431 - 2005
- [j1]Chia Yee Ooi, Thomas Clouqueur, Hideo Fujiwara:
Classification of Sequential Circuits Based on tauk Notation and Its Applications. IEICE Trans. Inf. Syst. 88-D(12): 2738-2747 (2005) - 2004
- [c1]Chia Yee Ooi, Hideo Fujiwara:
Classification of Sequential Circuits Based on ?k Notation. Asian Test Symposium 2004: 348-353
Coauthor Index
aka: Muhammad Nadzir Marsono
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-07 22:09 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
