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Hyochang Kim
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2020 – today
- 2024
- [c2]Okkeun Lee
, Rebecca Currano
, Dave Miller
, Hyochang Kim
, David Sirkin
:
Designing Visual Signals to Support Situation Awareness Recovery in Conditional Automated Driving. AutomotiveUI 2024: 248-258 - 2023
- [j4]Yesin Ryu
, Sung-Gi Ahn, Jaehoon Lee, Jaewon Park, Yong-Ki Kim
, Hyochang Kim
, Yeong Geol Song, Han-Won Cho, Sunghye Cho, Seung Ho Song, Haesuk Lee, Useung Shin, Jonghyun Ahn, Je-Min Ryu, Sukhan Lee, Kyounghwan Lim, Jungyu Lee, Jeong Hoan Park, Jae-Seung Jeong
, Sunghwan Jo
, Dajung Cho, Sooyoung Kim, Minsu Lee, Hyunho Kim
, Minhwan Kim, Jae San Kim, Jinah Kim, Hyun Gil Kang, Myung-Kyu Lee, Sung-Rae Kim, Young-Cheon Kwon, Young-Yong Byun, Kijun Lee, Sangkil Park, Jaeyoun Youn, Myeong-O. Kim, Kyomin Sohn
, SangJoon Hwang, JooYoung Lee:
A 16 GB 1024 GB/s HBM3 DRAM With Source-Synchronized Bus Design and On-Die Error Control Scheme for Enhanced RAS Features. IEEE J. Solid State Circuits 58(4): 1051-1061 (2023) - [j3]Hyochang Kim
, Hyeongmin Seo
, Hyuntae Kim
, Changsik Yoo, Jaeduk Han
:
A 16-Gb/s/Wire 4-Wire Short-Haul Transceiver With Balanced Single-Ended Signaling (BASES) in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 70(8): 2799-2803 (2023) - 2020
- [j2]Hyochang Kim
, Changsik Yoo
:
A 6-Gb/s Wireline Receiver With Intrapair Skew Compensation and Three-Tap Decision-Feedback Equalizer in 28-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1107-1117 (2020)
2010 – 2019
- 2017
- [j1]Hyochang Kim, Ook Kim, Changsik Yoo:
Duty-cycle and phase spacing error correction circuit for high-speed serial link. IEICE Electron. Express 14(12): 20170497 (2017) - 2016
- [c1]Hyochang Kim, Jaewoo Park, Woosang Han, Kyuhwan Oh, Taekjun Ahn, Jun-Gi Jo, Ook Kim, Changsik Yoo:
A HDMI-to-MHL video format conversion system-on-chip (SoC) for mobile handset in a 130-nm CMOS technology. ICCE 2016: 504-505
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