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ORCID15th SLIP 2013: Austin, TX, USA
- ACM/IEEE International Workshop on System Level Interconnect Prediction, SLIP 2013, Austin, TX, USA, June 2, 2013. IEEE Computer Society 2013, ISBN 978-1-4673-6173-6
- Andrew B. Kahng, Seokhyeong Kang, Hyein Lee, Siddhartha Nath, Jyoti Wadhwani:
Learning-based approximation of interconnect delay and slew in signoff timing tools. 1-8 - Andrew B. Kahng, Bill Lin, Siddhartha Nath:
High-dimensional metamodeling for prediction of clock tree synthesis outcomes. 1-7 - Deming Chen:
Optimizations in GPU: Smart compilers and core-level reconfiguration. 1 - Shaloo Rakheja, Vachan Kumar, Azad Naeemi
:
Performance modeling for interconnects for conventional and emerging switches. 1-9 - Randy Morris, Avinash Karanth Kodi, Ahmed Louri:
Evaluating the scalability and performance of 3D stacked reconfigurable nanophotonic interconnects. 1 - Xiang Zhang, Yang Liu, Chung-Kuan Cheng:
Worst-case noise prediction using power network impedance profile. 1-8 - Baris Taskin:
Wireless on Networks-on-Chip. 1-2 - Mark Browning, Cheng Li, Paul V. Gratz, Samuel Palermo:
LumiNOC: A low-latency, high-bandwidth per Watt, photonic Network-on-Chip. 1-4 - Tuck-Boon Chan, Andrew B. Kahng, Jiajia Li:
Toward quantifying the IC design value of interconnect technology improvements. 1-6 - Rasit Onur Topaloglu:
Chip-scale physical interconnect models (Tutorial). 1-3 - Doug Gill:
IBM CMOS compatible photonics and traveling wave electro-optic modulator design. 1 - Christopher Condrat, Priyank Kalla, Steve Blair:
Channel routing for integrated optics. 1-8
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