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ORCID19th MTV 2018: Austin, TX, USA
- 19th International Workshop on Microprocessor and SOC Test and Verification, MTV 2018, Austin, TX, USA, December 9-10, 2018. IEEE 2018, ISBN 978-1-5386-9250-9
- Asif Jafri, Jung-Wook Kim:
Proving the Capability of Arm IP for Functional Safety Applications. 1-5 - Mikhail M. Chupilko, Alexander Kamkin
, Artem Kotsynyak, Alexander Protsenko, Sergey A. Smolov, Andrei Tatarnikov:
Test Program Generator MicroTESK for RISC-V. 6-11 - Abdelfattah Munir, Mina Magdy, Samer Ahmed, Sherouk Nasr, Sameh El-Ashry, Ahmed Shalaby:
Fast Reliable Verification Methodology for RISC-V Without a Reference Model. 12-17 - Calvin Deutschbein, Cynthia Sturton:
Mining Security Critical Linear Temporal Logic Specifications for Processors. 18-23 - Siroos Madani, Mohammad R. Madani, Magdy A. Bayoumi:
A Perceptron-Inspired Technique for Hardware Obfuscation. 24-27 - Shelly Henry, Nirabh Regmi:
How to Close Coverage 10x Faster using Portable Stimulus Standard - A Case Study. 28-30 - Rekha Bangalore, Raji M. Bandanapudi:
Application of Combinatorial Test (CT) Algorithm for Protocol and Hardware Feature Validation. 31-34 - Manish Kumar Agarwal, Amandeep Sharan, Mohammad Asif Khan, Atul Gupta:
Multi-Master Validation Framework for Next Generation Automotive SOCs. 35-39 - Harry Foster:
2018 FPGA Functional Verification Trends. 40-45 - Jigar Savla:
Getting Started on Co-Emulation: Transition your Design and Testbench to an Emulator. 46-51 - Yanhua Cao, Osama Shoubber, Pallavi Jesrani:
Automatic Debug Quantification for Workload Balance and Progress Tracking. 52-55 - Ayushi Agarwal, Pankaj Gupta, Atul Gupta:
Advanced Regression Management for Post-Silicon Validation of Automotive SOCs. 56-60 - Sameh El-Ashry, Ahmed Adel:
Efficient Methodology of Sampling UVM RAL During Simulation for SoC Functional Coverage. 61-66 - Amr Moursi, Romaisaa Samhoud, Yaseen Kamal, Mazen Magdy, Sameh El-Ashry, Ahmed Shalaby:
Different Reference Models for UVM Environment to Speed Up the Verification Time. 67-72 - Chetas Mapara, Priti Nagarajan:
Transaction Based Speedup for Simulation Replay. 73-75 - Pratheema Mohandoss, Archana Rengaraj:
Pre-Silicon DFT Verification on SOC Slim Model. 76-78 - Rekha Bangalore, Adeosun luwatosin Oluwatosin, Kelvin K. Lam:
Schmoo Data Analysis Using Machine Language Algorithms. 79-85
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