Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID11th FDL 2008: Stuttgart, Germany
- Martin Radetzki:
Languages for Embedded Systems and their Applications - Selected Contributions on Specification, Design, and Verification from FDL'08, September 23-25, 2008, Stuttgart, Germany. Lecture Notes in Electrical Engineering 36, 2009
Part I / Model-Based System Specification Languages
- Eric Senn, Saadia Dhouib, Dominique Blouin, Johann Laurent, Skander Turki
, Jean-Philippe Diguet:
Power and Energy Estimations in Model-Based Design. 3-26 - Frédéric Mallet, Robert de Simone:
MARTE vs. AADL for Discrete-Event and Discrete-Time Domains. 27-41 - Andreas W. Liehr, Klaus J. Buchenrieder, Heike S. Rolfs, Ulrich Nageldinger:
Generation of MARTE Allocation Models from Activity Threads. 43-56 - Alessandro Carioni, Angelo Gargantini, Elvinia Riccobene, Patrizia Scandurra:
Model-Driven System Validation by Scenarios. 57-69 - Kai Hylla, Jan-Hendrik Oetjens, Wolfgang Nebel:
An Advanced Simulink Verification Flow Using SystemC. 71-84
Part II / Languages for Heterogeneous System Design
- Dafeng Zhou, Tom J. Kazmierski, Bashir M. Al-Hashimi:
VHDL-AMS Implementation of a Numerical Ballistic CNT Model. 87-100 - Rachid Guelaz, Patricia Desgreys, Patrick Loumeau:
Wide-Band Sigma-Delta ADC Design in Superconducting Technology. 101-112 - Ken Caluwaerts, Dimitri Galayko:
Heterogeneous and Non-linear Modeling in SystemC-AMS. 113-128
Part III / Digital Systems Design Methodologies Based on C++
- Jari Kreku, Mika Hoppari, Tuomo Kestilä, Yang Qu, Juha-Pekka Soininen, Kari Tiensyrjä:
Application Workload and SystemC Platform Modeling for Performance Evaluation. 131-147 - Rauf Salimi Khaligh, Martin Radetzki:
Adaptive Interconnect Models for Transaction-Level Simulation. 149-165 - Christian Kerstan, Nico Bannow, Wolfgang Rosenstiel:
Efficient Architecture Evaluation Using Functional Mapping. 167-182 - Jens Gladigau, Christian Haubelt, Jürgen Teich:
Symbolic Scheduling of SystemC Dataflow Designs. 183-199 - Francesco Stefanni, Davide Quaglia, Franco Fummi:
SystemC Simulation of Networked Embedded Systems. 201-211 - Philipp A. Hartmann, Philipp Reinkemeier, Henning Kleen, Wolfgang Nebel:
Modeling of Embedded Software Multitasking in SystemC/OSSS. 213-226 - Andreas Raabe, Armin Felke:
High-Level Reconfiguration Modeling in SystemC. 227-240 - Franjo Plavec, Zvonko G. Vranesic, Stephen Dean Brown:
Stream Programming for FPGAs. 241-253
Part IV / Verification and Requirements Evaluation
- Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Oliver Wienand, Evgeny Karibaev:
A New Verification Technique for Custom-Designed Components at the Arithmetic Bit Level. 257-272 - Daniel Große, Robert Wille, Robert Siegmund, Rolf Drechsler:
Debugging Contradictory Constraints in Constraint-Based Random Simulation. 273-290 - Alessandro Meroni, Vincenzo Rana, Marco D. Santambrogio, Francesco Bruschi:
Design of Communication Infrastructures for Reconfigurable Systems. 291-307 - Alexander Viehl, Björn Sander, Oliver Bringmann, Wolfgang Rosenstiel:
Analysis of Non-functional Properties of MPSoC Designs. 309-324
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-05-19 01:08 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
