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SIGARCH Computer Architecture News 22(Special Issue October 1994), SIGOPS Operating Systems Review 28(5) 1994, and SIGPLAN Notices 29(11) 1994

• 
  Chandramohan A. Thekkath, Henry M. Levy, Edward D. Lazowska:
  Separating Data and Control Transfer in Distributed Operating Systems. 2-11
• 
  Rohit Chandra, Scott Devine, Ben Verghese, Anoop Gupta, Mendel Rosenblum:
  Scheduling and Page Migration for Multiprocessor Compute Servers. 12-24
• 
  Beng-Hong Lim, Anant Agarwal:
  Reactive Synchronization Algorithms for Multiprocessors. 25-35

• 
  John Heinlein, Kourosh Gharachorloo, Scott Dresser, Anoop Gupta:
  Integration of Message Passing and Shared Memory in the Stanford FLASH Multiprocessor. 38-50
• 
  Vijay Karamcheti, Andrew A. Chien:
  Software Overhead in Messaging Layers: Where Does the Time Go? 51-60
• 
  Satish Chandra, James R. Larus, Anne Rogers:
  Where is Time Spent in Message-Passing and Shared-Memory Programs? 61-73

• 
  William J. Schmidt, Kelvin D. Nilsen:
  Performance of a Hardware-Assisted Real-Time Garbage Collector. 76-85
• 
  Michael Wu, Willy Zwaenepoel:
  eNVy: A Non-Volatile, Main Memory Storage System. 86-97
• 
  Michael Upton, Thomas Huff, Trevor N. Mudge, Richard B. Brown:
  Resource Allocation in a High Clock Rate Microprocessor. 98-109
• 
  Chandramohan A. Thekkath, Henry M. Levy:
  Hardware and Software Support for Efficient Exception Handling. 110-119

• 
  Pramod V. Argade, David K. Charles, Craig Taylor:
  A Technique for Monitoring Run-Time Dynamics of an Operating System and a Microprocessor Executing User Applications. 122-131
• 
  Richard Uhlig, David Nagle, Trevor N. Mudge, Stuart Sechrest:
  Trap-driven Simulation with Tapeworm II. 132-144
• 
  Ann Marie Grizzaffi Maynard, Colette M. Donnelly, Bret R. Olszewski:
  Contrasting Characteristics and Cache Performance of Technical and Multi-User Commercial Workloads. 145-156

• 
  Brian N. Bershad, Dennis Lee, Theodore H. Romer, J. Bradley Chen:
  Avoiding Conflict Misses Dynamically in Large Direct-Mapped Caches. 158-170
• 
  Madhusudhan Talluri, Mark D. Hill:
  Surpassing the TLB Performance of Superpages with Less Operating System Support. 171-182
• 
  David M. Gallagher, William Y. Chen, Scott A. Mahlke, John C. Gyllenhaal, Wen-mei W. Hwu:
  Dynamic Memory Disambiguation Using the Memory Conflict Buffer. 183-193

• 
  Kenichi Hayashi, Tsunehisa Doi, Takeshi Horie, Yoichi Koyanagi, Osamu Shiraki, Nobutaka Imamura, Toshiyuki Shimizu, Hiroaki Ishihata, Tatsuya Shindo:
  AP1000+: Architectural Support of PUT/GET Interface for Parallelizing Compiler. 196-207
• 
  James R. Larus, Brad Richards, Guhan Viswanathan:
  LCM: Memory System Support for Parallel Language Implementation. 208-218
• 
  Steven Cameron Woo, Jaswinder Pal Singh, John L. Hennessy:
  The Performance Advantages of Integrating Block Data Trabsfer in Cache-Coherent Multiprocessors. 219-229

• 
  Cliff Young, Michael D. Smith:
  Improving the Accuracy of Static Branch Prediction Using Branch Correlation. 232-241
• 
  Brad Calder, Dirk Grunwald:
  Reducing Branch Costs via Branch Alignment. 242-251
• 
  Steve Carr, Kathryn S. McKinley, Chau-Wen Tseng:
  Compiler Optimizations for Improving Data Locality. 252-262
• 
  Dawson R. Engler, Todd A. Proebsting:
  DCG: An Efficient, Retargetable Dynamic Code Generation System. 263-272

• 
  Mark A. Heinrich, Jeffrey Kuskin, David Ofelt, John Heinlein, Joel Baxter, Jaswinder Pal Singh, Richard Simoni, Kourosh Gharachorloo, David Nakahira, Mark Horowitz, Anoop Gupta, Mendel Rosenblum, John L. Hennessy:
  The Performance Impact of Flexibility in the Stanford FLASH Multiprocessor. 274-285
• 
  Jonas Skeppstedt, Per Stenström:
  Simple Compiler Algorithms to Reduce Ownership Operhead in Cache Coherence Protocols. 286-296
• 
  Ioannis Schoinas, Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, James R. Larus, David A. Wood:
  Fine-grain Access Control for Distributed Shared Memory. 297-306

• 
  James Laudon, Anoop Gupta, Mark Horowitz:
  Interleaving: A Multithreading Technique Targeting Multiprocessors and Workstations. 308-318
• 
  Nicholas P. Carter, Stephen W. Keckler, William J. Dally:
  Hardware Support for Fast Capability-based Addressing. 319-327
• 
  Radhika Thekkath, Susan J. Eggers:
  The Effectiveness of Multiple Hardware Contexts. 328-337

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