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Publication search results
found 20 matches
- 1984
- Giuseppe Alia, Ferruccio Barsi, Enrico Martinelli:
A fast near optimum VLSI implementation of FFT using residue number systems. Integr. 2(2): 133-147 (1984) - Kjell Øystein Arisland, Anne Cathrine Aasbø, Are Nundal:
VLSI parallel shift sort algorithm and design. Integr. 2(4): 331-347 (1984) - Magdy A. Bayoumi, Graham A. Jullien, William C. Miller:
A VLSI model for residue number system architectures. Integr. 2(3): 191-211 (1984) - Armin B. Cremers, Sun-Yuan Kung:
On programming VLSI concurrent array processors. Integr. 2(1): 15-26 (1984) - L. N. M. Edward:
On improving the quality of simple graphics. Integr. 2(4): 349-355 (1984) - David P. LaPotin, Sani R. Nassif, Jayanth V. Rajan, Michael L. Bushnell, John A. Nestor:
DIF: A framework for VLSI multi-level representation. Integr. 2(3): 227-241 (1984) - Rudolf H. Mak:
Optimization of programmable logic arrays. Integr. 2(2): 149-162 (1984) - Kurt Mehlhorn:
AT2-optimal VLSI integer division and integer square rooting. Integr. 2(2): 163-167 (1984) - N. P. van der Meijs, J. T. Fokkema:
VLSI circuit reconstruction from mask topology. Integr. 2(2): 85-119 (1984) - Claudio Moraga:
On a case of symbiosis between systolic arrays. Integr. 2(3): 243-253 (1984) - Ole Olesen, Christer Svensson:
NORCHIP, a silicon brokers model. Integr. 2(1): 3-13 (1984) - Kewal K. Saluja, Kim Thang Le:
Testable design of large random access memories. Integr. 2(4): 309-330 (1984) - Martine D. F. Schlag, Lin S. Woo, Chak-Kuen Wong:
Maximizing pin alignment by pin permutations. Integr. 2(4): 279-307 (1984) - L. Silvestri, S. Garue, Mario Marchente:
An heuristic SPICE2-based approach for 2D IIL device simulation. Integr. 2(2): 121-132 (1984) - Lambert Spaanenburg:
Editorial. Integr. 2(2): 83 (1984) - Lambert Spaanenburg:
Editorial. Integr. 2(3): 189 (1984) - Lambert Spaanenburg:
Editorial. Integr. 2(4): 277 (1984) - Dag Svanæs, Einar J. Aas:
Test generation through logic programming. Integr. 2(1): 49-67 (1984) - Qingjian Yu, Omar Wing:
PLMAP - A piecewise linear MOS circuit analysis program. Integr. 2(1): 27-48 (1984) - N. H. C. Yung, C. R. Allen, Hans K. E. Liesenberg, D. J. Kinniment:
A recursive design methodology for VLSI: Theory and example. Integr. 2(3): 213-225 (1984)
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retrieved on 2025-02-18 20:47 CET from data curated by the dblp team
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