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Publication search results
found 14 matches
- 2012
- Bin Bao, Xiaoya Xiang:
Defensive loop tiling for multi-core processor. MSPC 2012: 76-77 - Hans-Juergen Boehm:
Can seqlocks get along with programming language memory models? MSPC 2012: 12-20 - Matthew Davis, Peter Schachte, Zoltan Somogyi, Harald Søndergaard:
Towards region-based memory management for Go. MSPC 2012: 58-67 - Chen Ding, Xiaoya Xiang:
A higher order theory of locality. MSPC 2012: 68-69 - Hyesoon Kim:
Supporting virtual memory in GPGPU without supporting precise exceptions. MSPC 2012: 70-71 - Jieun Lim, Hyesoon Kim:
Design space exploration of memory model for heterogeneous computing. MSPC 2012: 74-75 - Erik Österlund, Welf Löwe:
Analysis of pure methods using garbage collection. MSPC 2012: 48-57 - Erez Petrank:
Can parallel data structures rely on automatic memory managers? MSPC 2012: 1 - Ronald Veldema, Michael Philippsen:
Parallel memory defragmentation on a GPU. MSPC 2012: 38-47 - Zhe Wang, Samira Manabi Khan, Daniel A. Jiménez:
Rank idle time prediction driven last-level cache writeback. MSPC 2012: 21-29 - Meng-Ju Wu, Donald Yeung:
Identifying optimal multicore cache hierarchies for loop-based parallel programs via reuse distance analysis. MSPC 2012: 2-11 - Eddy Z. Zhang, Han Li, Xipeng Shen:
A study towards optimal data layout for GPU computing. MSPC 2012: 72-73 - Pengfei Zhu, Mingyu Chen, Yungang Bao, Licheng Chen, Yongbing Huang:
Trace-driven simulation of memory system scheduling in multithread application. MSPC 2012: 30-37 - Lixin Zhang, Onur Mutlu:
Proceedings of the 2012 ACM SIGPLAN workshop on Memory Systems Performance and Correctness: held in conjunction with PLDI '12, Beijing, China, June 16, 2012. ACM 2012, ISBN 978-1-4503-1219-6 [contents]
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