• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 9 matches

• 2016
• 
  Robert Hesse, Natalie D. Enright Jerger:
  Hierarchical Clustering for On-Chip Networks. AISTECS@HiPEAC 2016: 2:1-2:6
• 
  Muhammad Ridwan Madarbux, Anouk Van Laer, Philip M. Watts, Timothy M. Jones:
  Energy Efficient And Low Latency Interconnection Network For Multicast Invalidates In Shared Memory Systems. AISTECS@HiPEAC 2016: 1:1-1:6
• 
  Rafael K. V. Maeda, Peng Yang, Xiaowen Wu, Zhe Wang, Jiang Xu, Zhehui Wang, Haoran Li, Luan H. K. Duong, Zhifei Wang:
  JADE: a Heterogeneous Multiprocessor System Simulation Platform Using Recorded and Statistical Application Models. AISTECS@HiPEAC 2016: 8:1-8:6
• 
  Gabriele Miorandi, Mahdi Tala, Marco Balboni, Luca Ramini, Davide Bertozzi:
  Evolutionary vs. Revolutionary Interconnect Technologies for Future Low-Power Multi-Core Systems. AISTECS@HiPEAC 2016: 3:1-3:6
• 
  Sébastien Rumley, Meisam Bahadori, Ke Wen, Dessislava Nikolova, Keren Bergman:
  PhoenixSim: Crosslayer Design and Modeling of Silicon Photonic Interconnects. AISTECS@HiPEAC 2016: 7:1-7:6
• 
  Armin Runge, Reiner Kolla:
  Consideration of the Flit Size for Deflection Routing based Network-on-Chips. AISTECS@HiPEAC 2016: 5:1-5:6
• 
  Najwa Salama, Azeddien M. Sllame:
  Designing an Efficient MPLS-Based Switch for FAT Tree Network-on-Chip Systems. AISTECS@HiPEAC 2016: 4:1-4:6
• 
  Nikos Terzenidis, Pavlos Maniotis, Nikos Pleros:
  Bringing OptoBoards to HPC-scale environments: An OptoHPC simulation engine. AISTECS@HiPEAC 2016: 6:1-6:6
• 
  Sören Sonntag, Sandro Bartolini, Giorgos Dimitrakopoulos, José M. García:
  Proceedings of the 1st International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems, AISTECS@HiPEAC 2016, Prague, Czech Republic, January 18, 2016. ACM 2016, ISBN 978-1-4503-4084-7 [contents]