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Publication search results
found 29 matches
- 2001
- Dines Bjørner:
On Formal Techniques in Protocol Engineering - Example Challenges. FORTE 2001: 395-420 - Howard Bowman:
Time and Action Lock Freedom Properties for Timed Automata. FORTE 2001: 119-134 - Jan Bredereke:
A Tool for Generating Specifications from a Family of Formal Requirements. FORTE 2001: 319-334 - Jeremy W. Bryans, Carron Shankland:
Implementing a Modal Logic over Data and Processes using XTL. FORTE 2001: 201-218 - Muffy Calder, Carron Shankland:
A Symbolic Semantics and Bisimulation for Full LOTOS. FORTE 2001: 185-200 - Wen-Huei Chen:
Executable Test Sequence for the Protocol Data Flow Property. FORTE 2001: 285-300 - Tin-Wo Cheung, Samuel T. Chanson:
A PKI-Based End-to-End Secure Infrastructure for Mobile E-Commerce. FORTE 2001: 421-442 - Jin-Young Choi, Hee Yong Youn, Soonuk Seol, Chuck Yoo:
Distributed Test using Logical Clock. FORTE 2001: 69-84 - Khaled El-Fakih, Nina Yevtushenko, Gregor von Bochmann:
Diagnosing Multiple Faults in Communicating Finite State Machines. FORTE 2001: 85-100 - Hubert Garavel, Frédéric Lang:
SVL: A Scripting Language for Compositional Verification. FORTE 2001: 377-394 - Pao-Ann Hsiung:
Formal Synthesis and Control of Soft Embedded Real-Time Systems. FORTE 2001: 35-52 - Ferhat Khendek, Stephan Bourduas, Daniel Vincent:
Stepwise Design with Message Sequence Charts. FORTE 2001: 19-34 - Xiaohua Kong, Radu Negulescu:
Formal Verification of Peephole Optimizations in Asynchronous Circuits. FORTE 2001: 219-234 - Insup Lee, Jin-Young Choi, Hee-Hwan Kwak, Anna Philippou, Oleg Sokolsky:
A Family of Resource-Bound Real-Time Process Algebras. FORTE 2001: 443-458 - David Lee, Ruibing Hao:
Test Sequence Selection. FORTE 2001: 269-284 - Matti Luukkainen:
Verification of Dense Time Properties using Theories of Untimed Process Algebra. FORTE 2001: 353-368 - Takanori Mori, K. Tokuda, Harumasa Tada, Masahiro Higuchi, Teruo Higashino:
A Method to Generate Conformance Test Sequences for FSM with Timer System Call. FORTE 2001: 301-318 - Akio Nakata, Teruo Higashino:
Deriving Parameter Conditions for Periodic Timed Automata Satisfying Real-Time Temporal Logic Formulas. FORTE 2001: 151-168 - Manuel Núñez, Ismael Rodríguez:
PAMR: A Process Algebra for the Management of Resources in Concurrent Systems. FORTE 2001: 169-184 - Vlad Rusu:
Verifying a Sliding Window Protocol using PVS. FORTE 2001: 251-268 - Aziz Salah, Rachida Dssouli, Guy Lapalme:
Compiling Real-Time Scenarios into a Timed Automaton. FORTE 2001: 135-150 - Sven Twarok, Peter Langendörfer, Hartmut König:
Automated Derivation of ILP Implementations from SDL Specifications. FORTE 2001: 3-18 - Ulrich Ultes-Nitsche, Simon St. James:
Testing Liveness Properties: Approximating Liveness Properties by Safety Properties. FORTE 2001: 369-376 - César Viho, Sébastien Barbin, Lénaick Tanguy:
Towards a Formal Framework for Interoperability Testing. FORTE 2001: 53-68 - Farn Wang:
Symbolic Verification of Complex Real-Time Systems with Clock-Restriction Diagram. FORTE 2001: 235-250 - Heike Wehrheim:
Patterns and Rules for Behavioural Subtyping. FORTE 2001: 335-352 - Jeannette M. Wing:
Survivability Analysis of Networked Systems. FORTE 2001: 459- - Jianping Wu, Yixin Zhao, Xia Yin:
From Active to Passive: Progress in Testing of Internet Routing Protocols. FORTE 2001: 101-118 - Myungchul Kim, Byoungmoon Chin, Sungwon Kang, Danhyung Lee:
Formal Techniques for Networked and Distributed Systems, FORTE 2001, IFIP TC6/WG6.1 - 21st International Conference on Formal Techniques for Networked and Distributed Systems, August 28-31, 2001, Cheju Island, Korea. IFIP Conference Proceedings 197, Kluwer 2001, ISBN 0-7923-7470-3 [contents]
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