- Mookyoung Yoo, Hyeoktae Son, Kyounghwan Kim, Jihyang Wi, Gibae Nam, Minhyoek Son, Manhyoek Choi, Hyoungho Ko:
Zero-Drift Fully Differential Amplifier With Ping-Pong Auto-Zero Stabilization and Digitally-Assisted Coarse Automatic Offset Calibration. IEEE Trans. Circuits Syst. II Express Briefs 72(1): 38-42 (2025) - Hongjie Zeng, Zemeng Huang, Tao Tan, Yubing Li, Xiuping Li:
Parasitic-Aware Analysis and Design of a Wideband gm-Boost Low Noise Amplifier at K-Band. IEEE Trans. Circuits Syst. II Express Briefs 72(1): 138-142 (2025) - Wenyue Zhang, Pingcheng Dong, Lei Chen, Zhengyu Ma, Fengwei An:
Min-Pooling Cost Aggregation for Semi-Global Matching of Stereo Vision Processor. IEEE Trans. Circuits Syst. II Express Briefs 72(1): 258-262 (2025) - Guosheng Zhang, Lisong Shao, Hanqian Wu, Xiaotian Gu, Xinyi Zhang:
Dora: A Low-Latency Partial Reconfiguration Controller for Reconfigurable System. IEEE Trans. Circuits Syst. II Express Briefs 72(1): 268-272 (2025) - Jian Zhang, Ming Zhai, Yichen Liu, Xiangjie Yi, Dawei Wang, Wei Zhu, Yan Wang:
A Broadband Bidirectional Four-Element Four-Beam Beamformer With Compact Floorplan in a 65nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs 72(1): 158-162 (2025) - Haonan Zhang, Siyu Zhang, Wendong Mao, Zhongfeng Wang:
An Efficient Brain-Inspired Accelerator Using a High-Accuracy Conversion Algorithm for Spiking Deformable CNN. IEEE Trans. Circuits Syst. II Express Briefs 72(1): 288-292 (2025) - Zhong Zhao, Ping Luo, Zhiyuan Zhang, Jiahang Fan, Bo Zhang, Xiaowen Chen:
A Peak-Valley Current-Mode Buck Converter With 3% to 95% Duty Cycle. IEEE Trans. Circuits Syst. II Express Briefs 72(1): 328-332 (2025) - Jiemei Zhao, Yi Shen, Leimin Wang, Liqi Yu:
Reachable Set Estimation of Inertial Complex-Valued Memristive Neural Networks. IEEE Trans. Circuits Syst. II Express Briefs 72(1): 213-217 (2025) - Zhengqing Zhong, Haibing Wang, Mingju Chen, Yingcheng Lin, Min Tian, Tengxiao Wang, Liyuan Liu, Cong Shi:
MorphBungee-Lite: An Edge Neuromorphic Architecture With Balanced Cross-Core Workloads Based on Layer-Wise Event-Batch Learning/Inference. IEEE Trans. Circuits Syst. II Express Briefs 72(1): 293-297 (2025) - Changchun Zhou, Xuexi He, Bolun Zeng, Jun Xu, Chao Luo, Guo-Ping Guo:
A 200-MS/s 12-b Cryo-CMOS CS DAC for Quantum Computing. IEEE Trans. Circuits Syst. II Express Briefs 72(1): 98-102 (2025) - Jialiang Zhu, Yiyang Yuan, Long Nie, Weiye Tang, Ming Li, Hao Wu, Xiaojin Zhao, Guozhong Xing, Feng Zhang:
A 28 nm 75.6 KOPS 13 nJ Computing-in-Memory Pipeline Number Theoretic Transform Accelerator for PQC. IEEE Trans. Circuits Syst. II Express Briefs 72(1): 273-277 (2025)
