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@article{DBLP:journals/jsa/CardonaUSF17, author = {Luis Andr{\'{e}}s Cardona and Anees Ullah and Luca Sterpone and Carles Ferrer}, title = {A novel tool-flow for zero-overhead cross-domain error resilient partially reconfigurable {X-TMR} for SRAM-based FPGAs}, journal = {J. Syst. Archit.}, volume = {81}, pages = {112--120}, year = {2017}, url = {https://doi.org/10.1016/j.sysarc.2017.10.009}, doi = {10.1016/J.SYSARC.2017.10.009}, timestamp = {Thu, 16 Feb 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jsa/CardonaUSF17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/ChangWYHL17, author = {Yuan{-}Ming Chang and Shao{-}Chung Wang and Chun{-}Chieh Yang and Yuan{-}Shin Hwang and Jenq{-}Kuen Lee}, title = {Enabling PoCL-based runtime frameworks on the {HSA} for OpenCL 2.0 support}, journal = {J. Syst. Archit.}, volume = {81}, pages = {71--82}, year = {2017}, url = {https://doi.org/10.1016/j.sysarc.2017.10.004}, doi = {10.1016/J.SYSARC.2017.10.004}, timestamp = {Mon, 24 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jsa/ChangWYHL17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/DehnaviE17, author = {Mohammad Dehnavi and Mohammad Eshghi}, title = {{FPGA} based real-time on-road stereo vision system}, journal = {J. Syst. Archit.}, volume = {81}, pages = {32--43}, year = {2017}, url = {https://doi.org/10.1016/j.sysarc.2017.10.002}, doi = {10.1016/J.SYSARC.2017.10.002}, timestamp = {Mon, 24 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jsa/DehnaviE17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/KuoTCYC17, author = {Cheng{-}Ju Kuo and Kuo{-}Cheng Ting and Yi{-}Chung Chen and Don{-}Lin Yang and Hsi{-}Min Chen}, title = {Automatic machine status prediction in the era of Industry 4.0: Case study of machines in a spring factory}, journal = {J. Syst. Archit.}, volume = {81}, pages = {44--53}, year = {2017}, url = {https://doi.org/10.1016/j.sysarc.2017.10.007}, doi = {10.1016/J.SYSARC.2017.10.007}, timestamp = {Mon, 26 Jun 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jsa/KuoTCYC17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/LaiYTH17, author = {Cheng{-}Kung Lai and Chih Wei Yeh and Chia{-}Heng Tu and Shih{-}Hao Hung}, title = {Fast profiling framework and race detection for heterogeneous system}, journal = {J. Syst. Archit.}, volume = {81}, pages = {83--91}, year = {2017}, url = {https://doi.org/10.1016/j.sysarc.2017.10.010}, doi = {10.1016/J.SYSARC.2017.10.010}, timestamp = {Mon, 24 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jsa/LaiYTH17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/LiLZ17, author = {Bo Li and Ying Lin and Simin Zhang}, title = {Multi-Task Learning for Intrusion Detection on web logs}, journal = {J. Syst. Archit.}, volume = {81}, pages = {92--100}, year = {2017}, url = {https://doi.org/10.1016/j.sysarc.2017.10.011}, doi = {10.1016/J.SYSARC.2017.10.011}, timestamp = {Mon, 14 Mar 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jsa/LiLZ17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/LiaoKS17, author = {Shih{-}Wei Liao and Chia{-}Lung Kao and Yuki Shimizu}, title = {A profile-guided synergistic computation framework for Halide}, journal = {J. Syst. Archit.}, volume = {81}, pages = {54--61}, year = {2017}, url = {https://doi.org/10.1016/j.sysarc.2017.10.005}, doi = {10.1016/J.SYSARC.2017.10.005}, timestamp = {Mon, 24 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jsa/LiaoKS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/TsengY17, author = {Chinyang Henry Tseng and Jing{-}Shyang Yen}, title = {Enhanced Gaussian mixture model of {RSSI} purification for indoor positioning}, journal = {J. Syst. Archit.}, volume = {81}, pages = {1--6}, year = {2017}, url = {https://doi.org/10.1016/j.sysarc.2017.10.003}, doi = {10.1016/J.SYSARC.2017.10.003}, timestamp = {Mon, 24 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jsa/TsengY17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/WangZCJS17, author = {Chang Wang and Yongxin Zhu and Victor Chang and Jiang Jiang and Han Song}, title = {Synergistic design of an application-oriented sparse directory on many-core embedded systems}, journal = {J. Syst. Archit.}, volume = {81}, pages = {62--70}, year = {2017}, url = {https://doi.org/10.1016/j.sysarc.2017.10.006}, doi = {10.1016/J.SYSARC.2017.10.006}, timestamp = {Thu, 28 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jsa/WangZCJS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/XieZRXDZ17, author = {Yong Xie and Gang Zeng and Ryo Kurachi and Guoqi Xie and Yong Dou and Zhili Zhou}, title = {An optimized design of {CAN} {FD} for automotive cyber-physical systems}, journal = {J. Syst. Archit.}, volume = {81}, pages = {101--111}, year = {2017}, url = {https://doi.org/10.1016/j.sysarc.2017.10.008}, doi = {10.1016/J.SYSARC.2017.10.008}, timestamp = {Mon, 24 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jsa/XieZRXDZ17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/YoonLCHC17, author = {Chanmin Yoon and Seokjun Lee and Yonghun Choi and Rhan Ha and Hojung Cha}, title = {Accurate power modeling of modern mobile application processors}, journal = {J. Syst. Archit.}, volume = {81}, pages = {17--31}, year = {2017}, url = {https://doi.org/10.1016/j.sysarc.2017.10.001}, doi = {10.1016/J.SYSARC.2017.10.001}, timestamp = {Mon, 24 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jsa/YoonLCHC17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/ZhangLSLH17, author = {Haitao Zhang and Guoqiang Li and Daniel Sun and Yonggang Lu and Ching{-}Hsien Hsu}, title = {Verifying cooperative software: {A} SMT-based bounded model checking approach for deterministic scheduler}, journal = {J. Syst. Archit.}, volume = {81}, pages = {7--16}, year = {2017}, url = {https://doi.org/10.1016/j.sysarc.2017.09.008}, doi = {10.1016/J.SYSARC.2017.09.008}, timestamp = {Tue, 27 Apr 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jsa/ZhangLSLH17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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