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@article{DBLP:journals/integration/BoulhamBL22, author = {Ihab Abderraouf Boulham and Ahsene Boubakir and Salim Labiod}, title = {Neural network {\(\mathscr{L}\)}1 adaptive control for a class of uncertain fractional order nonlinear systems}, journal = {Integr.}, volume = {83}, pages = {1--11}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2021.11.002}, doi = {10.1016/J.VLSI.2021.11.002}, timestamp = {Wed, 23 Feb 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/BoulhamBL22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/DelwarSBBRCR22, author = {Tahesin Samira Delwar and Abrar Siddique and Manas Ranjan Biswal and Prangyadarsini Behera and Ahmed Nabih Zaki Rashed and Yeji Choi and Jee{-}Youl Ryu}, title = {A novel dual mode configurable and tunable high-gain, high-efficient {CMOS} power amplifier for 5G applications}, journal = {Integr.}, volume = {83}, pages = {77--87}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2021.12.004}, doi = {10.1016/J.VLSI.2021.12.004}, timestamp = {Wed, 23 Feb 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/DelwarSBBRCR22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/GhorbaniDZB22, author = {Ali Ghorbani and Mehdi Dolatshahi and Sayed Mohammad Ali Zanjani and Behrang Barekatain}, title = {A new low-power Dynamic-GDI full adder in {CNFET} technology}, journal = {Integr.}, volume = {83}, pages = {46--59}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2021.12.001}, doi = {10.1016/J.VLSI.2021.12.001}, timestamp = {Sun, 04 Aug 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/GhorbaniDZB22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/LiQTHY22, author = {Benzheng Li and Zhongdong Qi and Zhengguang Tang and Xiyi He and Hailong You}, title = {High quality hypergraph partitioning for logic emulation}, journal = {Integr.}, volume = {83}, pages = {67--76}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2021.11.005}, doi = {10.1016/J.VLSI.2021.11.005}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/integration/LiQTHY22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/MohanA22, author = {Navya Mohan and J. P. Anita}, title = {Test and diagnosis pattern generation for distinguishing stuck-at faults and bridging faults}, journal = {Integr.}, volume = {83}, pages = {24--32}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2021.12.002}, doi = {10.1016/J.VLSI.2021.12.002}, timestamp = {Wed, 23 Feb 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/MohanA22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/ShaikSPG22, author = {Jani Babu Shaik and Sonal Singhal and Siona Menezes Picardo and Nilesh Goel}, title = {Impact of various {NBTI} distributions on {SRAM} performance for FinFET technology}, journal = {Integr.}, volume = {83}, pages = {60--66}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2021.12.005}, doi = {10.1016/J.VLSI.2021.12.005}, timestamp = {Wed, 23 Feb 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/ShaikSPG22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/SwainS22, author = {Monalisa Swain and Debabala Swain}, title = {An effective watermarking technique using {BTC} and {SVD} for image authentication and quality recovery}, journal = {Integr.}, volume = {83}, pages = {12--23}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2021.11.004}, doi = {10.1016/J.VLSI.2021.11.004}, timestamp = {Wed, 23 Feb 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/SwainS22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/VidyaS22, author = {P. Meenakshi Vidya and S. Sudha}, title = {A fully integrated {VLSI} architecture using chaotic {PWM} for {RF} transmitter design with electromagnetic interference reduction}, journal = {Integr.}, volume = {83}, pages = {33--45}, year = {2022}, url = {https://doi.org/10.1016/j.vlsi.2021.12.003}, doi = {10.1016/J.VLSI.2021.12.003}, timestamp = {Tue, 22 Feb 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/VidyaS22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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