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@article{DBLP:journals/ijrc/AmagasakiYKIS08, author = {Motoki Amagasaki and Ryoichi Yamaguchi and Masahiro Koga and Masahiro Iida and Toshinori Sueyoshi}, title = {An Embedded Reconfigurable {IP} Core with Variable Grain Logic Cell Architecture}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {180216:1--180216:14}, year = {2008}, url = {https://doi.org/10.1155/2008/180216}, doi = {10.1155/2008/180216}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/AmagasakiYKIS08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/BeckerHWLET08, author = {J{\"{u}}rgen Becker and Michael H{\"{u}}bner and Roger F. Woods and Philip Heng Wai Leong and Robert Esser and Lionel Torres}, title = {Current Trends on Reconfigurable Computing}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {918525:1}, year = {2008}, url = {https://doi.org/10.1155/2008/918525}, doi = {10.1155/2008/918525}, timestamp = {Wed, 28 Apr 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/BeckerHWLET08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/BoukhechemB08, author = {Sami Boukhechem and El{-}Bay Bourennane}, title = {SystemC Transaction-Level Modeling of an MPSoC Platform Based on an Open Source {ISS} by Using Interprocess Communication}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {902653:1--902653:10}, year = {2008}, url = {https://doi.org/10.1155/2008/902653}, doi = {10.1155/2008/902653}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/BoukhechemB08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/ChinLW08, author = {Scott Y. L. Chin and Clarence S. P. Lee and Steven J. E. Wilton}, title = {On the Power Dissipation of Embedded Memory Blocks Used to Implement Logic in Field-Programmable Gate Arrays}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {751863:1--751863:13}, year = {2008}, url = {https://doi.org/10.1155/2008/751863}, doi = {10.1155/2008/751863}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/ChinLW08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/CravenA08, author = {Stephen D. Craven and Peter M. Athanas}, title = {Dynamic Hardware Development}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {901328:1--901328:10}, year = {2008}, url = {https://doi.org/10.1155/2008/901328}, doi = {10.1155/2008/901328}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/CravenA08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/DandekarPBS08, author = {Omkar Dandekar and William Plishker and Shuvra S. Bhattacharyya and Raj Shekhar}, title = {Multiobjective Optimization for Reconfigurable Implementation of Medical Image Registration}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {738174:1--738174:17}, year = {2008}, url = {https://doi.org/10.1155/2008/738174}, doi = {10.1155/2008/738174}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/DandekarPBS08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/DitmarMW08, author = {Johan Ditmar and Steve McKeever and Alex Wilson}, title = {Area Optimisation for Field-Programmable Gate Arrays in SystemC Hardware Compilation}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {674340:1--674340:14}, year = {2008}, url = {https://doi.org/10.1155/2008/674340}, doi = {10.1155/2008/674340}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/DitmarMW08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/GuillemenetTSB08, author = {Yoann Guillemenet and Lionel Torres and Gilles Sassatelli and Nicolas Bruchon}, title = {On the Use of Magnetic RAMs in Field-Programmable Gate Arrays}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {723950:1--723950:9}, year = {2008}, url = {https://doi.org/10.1155/2008/723950}, doi = {10.1155/2008/723950}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/GuillemenetTSB08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/JuanRGR08, author = {Guillermo Botella Juan and Manuel Rodr{\'{\i}}guez and Antonio Garc{\'{\i}}a and Eduardo Ros}, title = {Neuromorphic Configurable Architecture for Robust Motion Estimation}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {428265:1--428265:9}, year = {2008}, url = {https://doi.org/10.1155/2008/428265}, doi = {10.1155/2008/428265}, timestamp = {Fri, 13 Nov 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ijrc/JuanRGR08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/OliveiraSS08, author = {Duarte Lopes de Oliveira and Marius Strum and Sandro S. Sato}, title = {Burst-Mode Asynchronous Controllers on {FPGA}}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {926851:1--926851:10}, year = {2008}, url = {https://doi.org/10.1155/2008/926851}, doi = {10.1155/2008/926851}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/OliveiraSS08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/PuschiniCBST08, author = {Diego Puschini and Fabien Clermidy and Pascal Benoit and Gilles Sassatelli and Lionel Torres}, title = {A Game-Theoretic Approach for Run-Time Distributed Optimization on MP-SoC}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {403086:1--403086:11}, year = {2008}, url = {https://doi.org/10.1155/2008/403086}, doi = {10.1155/2008/403086}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/PuschiniCBST08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/Raygoza-PanduroORG08, author = {Juan Jos{\'{e}} Raygoza{-}Panduro and Susana Ortega{-}Cisneros and Jorge Rivera and Alberto de la Mora G{\'{a}}lvez}, title = {Design of a Mathematical Unit in {FPGA} for the Implementation of the Control of a Magnetic Levitation System}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {634306:1--634306:9}, year = {2008}, url = {https://doi.org/10.1155/2008/634306}, doi = {10.1155/2008/634306}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/Raygoza-PanduroORG08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/SioziosBS08, author = {Kostas Siozios and Alexandros Bartzas and Dimitrios Soudris}, title = {Architecture-Level Exploration of Alternative Interconnection Schemes Targeting 3D FPGAs: {A} Software-Supported Methodology}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {764942:1--764942:18}, year = {2008}, url = {https://doi.org/10.1155/2008/764942}, doi = {10.1155/2008/764942}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/SioziosBS08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/SutterK08, author = {Gustavo Sutter and Richard Katz}, title = {Selected Papers from {SPL} 2008: Programmable Logic and Applications}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {921921:1--921921:2}, year = {2008}, url = {https://doi.org/10.1155/2008/921921}, doi = {10.1155/2008/921921}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/SutterK08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/WeiLNAE08, author = {Zhaoyi Wei and Dah{-}Jye Lee and Brent E. Nelson and James K. Archibald and Barrett Edwards}, title = {FPGA-Based Embedded Motion Estimation Sensor}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {636145:1--636145:8}, year = {2008}, url = {https://doi.org/10.1155/2008/636145}, doi = {10.1155/2008/636145}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/WeiLNAE08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijrc/YuLWLL08, author = {Chi Wai Yu and Julien Lamoureux and Steven J. E. Wilton and Philip Heng Wai Leong and Wayne Luk}, title = {The Coarse-Grained/Fine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units}, journal = {Int. J. Reconfigurable Comput.}, volume = {2008}, pages = {736203:1--736203:10}, year = {2008}, url = {https://doi.org/10.1155/2008/736203}, doi = {10.1155/2008/736203}, timestamp = {Thu, 02 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijrc/YuLWLL08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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