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@inproceedings{DBLP:conf/mtv/AgarwalGG18,
  author       = {Ayushi Agarwal and
                  Pankaj Gupta and
                  Atul Gupta},
  title        = {Advanced Regression Management for Post-Silicon Validation of Automotive
                  SOCs},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {56--60},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00021},
  doi          = {10.1109/MTV.2018.00021},
  timestamp    = {Wed, 16 Oct 2019 14:14:57 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/AgarwalGG18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/AgarwalSKG18,
  author       = {Manish Kumar Agarwal and
                  Amandeep Sharan and
                  Mohammad Asif Khan and
                  Atul Gupta},
  title        = {Multi-Master Validation Framework for Next Generation Automotive SOCs},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {35--39},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00017},
  doi          = {10.1109/MTV.2018.00017},
  timestamp    = {Wed, 13 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/AgarwalSKG18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/BangaloreB18,
  author       = {Rekha Bangalore and
                  Raji M. Bandanapudi},
  title        = {Application of Combinatorial Test {(CT)} Algorithm for Protocol and
                  Hardware Feature Validation},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {31--34},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00016},
  doi          = {10.1109/MTV.2018.00016},
  timestamp    = {Fri, 05 Jul 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/BangaloreB18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/BangaloreOL18,
  author       = {Rekha Bangalore and
                  Adeosun luwatosin Oluwatosin and
                  Kelvin K. Lam},
  title        = {Schmoo Data Analysis Using Machine Language Algorithms},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {79--85},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00026},
  doi          = {10.1109/MTV.2018.00026},
  timestamp    = {Thu, 31 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/BangaloreOL18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/CaoSJ18,
  author       = {Yanhua Cao and
                  Osama Shoubber and
                  Pallavi Jesrani},
  title        = {Automatic Debug Quantification for Workload Balance and Progress Tracking},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {52--55},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00020},
  doi          = {10.1109/MTV.2018.00020},
  timestamp    = {Fri, 05 Jul 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/CaoSJ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/ChupilkoKKPST18,
  author       = {Mikhail M. Chupilko and
                  Alexander Kamkin and
                  Artem Kotsynyak and
                  Alexander Protsenko and
                  Sergey A. Smolov and
                  Andrei Tatarnikov},
  title        = {Test Program Generator MicroTESK for {RISC-V}},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {6--11},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00011},
  doi          = {10.1109/MTV.2018.00011},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/ChupilkoKKPST18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/DeutschbeinS18,
  author       = {Calvin Deutschbein and
                  Cynthia Sturton},
  title        = {Mining Security Critical Linear Temporal Logic Specifications for
                  Processors},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {18--23},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00013},
  doi          = {10.1109/MTV.2018.00013},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/DeutschbeinS18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/El-AshryA18,
  author       = {Sameh El{-}Ashry and
                  Ahmed Adel},
  title        = {Efficient Methodology of Sampling {UVM} {RAL} During Simulation for
                  SoC Functional Coverage},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {61--66},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00022},
  doi          = {10.1109/MTV.2018.00022},
  timestamp    = {Mon, 15 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/El-AshryA18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/Foster18,
  author       = {Harry Foster},
  title        = {2018 {FPGA} Functional Verification Trends},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {40--45},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00018},
  doi          = {10.1109/MTV.2018.00018},
  timestamp    = {Fri, 05 Jul 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/Foster18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/HenryR18,
  author       = {Shelly Henry and
                  Nirabh Regmi},
  title        = {How to Close Coverage 10x Faster using Portable Stimulus Standard
                  - {A} Case Study},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {28--30},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00015},
  doi          = {10.1109/MTV.2018.00015},
  timestamp    = {Fri, 05 Jul 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/HenryR18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/JafriK18,
  author       = {Asif Jafri and
                  Jung{-}Wook Kim},
  title        = {Proving the Capability of Arm {IP} for Functional Safety Applications},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00010},
  doi          = {10.1109/MTV.2018.00010},
  timestamp    = {Fri, 05 Jul 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/JafriK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/MadaniMB18,
  author       = {Siroos Madani and
                  Mohammad R. Madani and
                  Magdy A. Bayoumi},
  title        = {A Perceptron-Inspired Technique for Hardware Obfuscation},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {24--27},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00014},
  doi          = {10.1109/MTV.2018.00014},
  timestamp    = {Mon, 20 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/MadaniMB18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/MaparaN18,
  author       = {Chetas Mapara and
                  Priti Nagarajan},
  title        = {Transaction Based Speedup for Simulation Replay},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {73--75},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00024},
  doi          = {10.1109/MTV.2018.00024},
  timestamp    = {Fri, 05 Jul 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/MaparaN18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/MohandossR18,
  author       = {Pratheema Mohandoss and
                  Archana Rengaraj},
  title        = {Pre-Silicon {DFT} Verification on {SOC} Slim Model},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {76--78},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00025},
  doi          = {10.1109/MTV.2018.00025},
  timestamp    = {Fri, 05 Jul 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/MohandossR18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/MoursiSKMES18,
  author       = {Amr Moursi and
                  Romaisaa Samhoud and
                  Yaseen Kamal and
                  Mazen Magdy and
                  Sameh El{-}Ashry and
                  Ahmed Shalaby},
  title        = {Different Reference Models for {UVM} Environment to Speed Up the Verification
                  Time},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {67--72},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00023},
  doi          = {10.1109/MTV.2018.00023},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/MoursiSKMES18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/MunirMANES18,
  author       = {Abdelfattah Munir and
                  Mina Magdy and
                  Samer Ahmed and
                  Sherouk Nasr and
                  Sameh El{-}Ashry and
                  Ahmed Shalaby},
  title        = {Fast Reliable Verification Methodology for {RISC-V} Without a Reference
                  Model},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {12--17},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00012},
  doi          = {10.1109/MTV.2018.00012},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/MunirMANES18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/Savla18,
  author       = {Jigar Savla},
  title        = {Getting Started on Co-Emulation: Transition your Design and Testbench
                  to an Emulator},
  booktitle    = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  pages        = {46--51},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/MTV.2018.00019},
  doi          = {10.1109/MTV.2018.00019},
  timestamp    = {Fri, 05 Jul 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/Savla18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/mtv/2018,
  title        = {19th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2018, Austin, TX, USA, December 9-10, 2018},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/8742691/proceeding},
  isbn         = {978-1-5386-9250-9},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/2018.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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