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@inproceedings{DBLP:conf/micro/BadriHK12,
  author       = {Shabnam Badri and
                  Rickard Holsmark and
                  Shashi Kumar},
  editor       = {Maurizio Palesi and
                  Terrence S. T. Mak},
  title        = {Junction based routing: a scalable technique to support source routing
                  in large NoC platforms},
  booktitle    = {Fifth International Workshop on Network on Chip Architectures, NoCArc
                  '12, Vancouver, BC, Canada, December 1, 2012},
  pages        = {45--50},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2401716.2401727},
  doi          = {10.1145/2401716.2401727},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/micro/BadriHK12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/ChungAT12,
  author       = {Haera Chung and
                  Anusha Pai Asnodkar and
                  Christof Teuscher},
  editor       = {Maurizio Palesi and
                  Terrence S. T. Mak},
  title        = {A structural analysis of evolved complex networks-on-chip},
  booktitle    = {Fifth International Workshop on Network on Chip Architectures, NoCArc
                  '12, Vancouver, BC, Canada, December 1, 2012},
  pages        = {17--22},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2401716.2401721},
  doi          = {10.1145/2401716.2401721},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/micro/ChungAT12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/DahirAYMM12,
  author       = {Nizar Dahir and
                  Ra'ed Al{-}Dujaily and
                  Alex Yakovlev and
                  Petros Missailidis and
                  Terrence S. T. Mak},
  editor       = {Maurizio Palesi and
                  Terrence S. T. Mak},
  title        = {Deadlock-free and plane-balanced adaptive routing for 3D networks-on-chip},
  booktitle    = {Fifth International Workshop on Network on Chip Architectures, NoCArc
                  '12, Vancouver, BC, Canada, December 1, 2012},
  pages        = {31--36},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2401716.2401724},
  doi          = {10.1145/2401716.2401724},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/micro/DahirAYMM12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/GawishEA12,
  author       = {Eman Kamel Gawish and
                  M. Watheq El{-}Kharashi and
                  Mohamed Fathy Abu{-}ElYazeed},
  editor       = {Maurizio Palesi and
                  Terrence S. T. Mak},
  title        = {Variability-tolerant NoC link design},
  booktitle    = {Fifth International Workshop on Network on Chip Architectures, NoCArc
                  '12, Vancouver, BC, Canada, December 1, 2012},
  pages        = {57--62},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2401716.2401729},
  doi          = {10.1145/2401716.2401729},
  timestamp    = {Sat, 20 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/GawishEA12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/HanninenBNB12,
  author       = {Ismo H{\"{a}}nninen and
                  Wayne Buckhanan and
                  Michael T. Niemier and
                  Gary H. Bernstein},
  editor       = {Maurizio Palesi and
                  Terrence S. T. Mak},
  title        = {Network on metachip architectures},
  booktitle    = {Fifth International Workshop on Network on Chip Architectures, NoCArc
                  '12, Vancouver, BC, Canada, December 1, 2012},
  pages        = {5--10},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2401716.2401719},
  doi          = {10.1145/2401716.2401719},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/micro/HanninenBNB12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/KarkarAYTM12,
  author       = {Ammar Karkar and
                  Ra'ed Al{-}Dujaily and
                  Alex Yakovlev and
                  Kenneth Tong and
                  Terrence S. T. Mak},
  editor       = {Maurizio Palesi and
                  Terrence S. T. Mak},
  title        = {Surface wave communication system for on-chip and off-chip interconnects},
  booktitle    = {Fifth International Workshop on Network on Chip Architectures, NoCArc
                  '12, Vancouver, BC, Canada, December 1, 2012},
  pages        = {11--16},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2401716.2401720},
  doi          = {10.1145/2401716.2401720},
  timestamp    = {Sun, 02 Jun 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/KarkarAYTM12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/MischeU12,
  author       = {J{\"{o}}rg Mische and
                  Theo Ungerer},
  editor       = {Maurizio Palesi and
                  Terrence S. T. Mak},
  title        = {Low power flitwise routing in an unidirectional torus with minimal
                  buffering},
  booktitle    = {Fifth International Workshop on Network on Chip Architectures, NoCArc
                  '12, Vancouver, BC, Canada, December 1, 2012},
  pages        = {63--68},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2401716.2401730},
  doi          = {10.1145/2401716.2401730},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/micro/MischeU12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/ParkC12,
  author       = {Hanmin Park and
                  Kiyoung Choi},
  editor       = {Maurizio Palesi and
                  Terrence S. T. Mak},
  title        = {Position-based weighted round-robin arbitration for equality of service
                  in many-core network-on-chips},
  booktitle    = {Fifth International Workshop on Network on Chip Architectures, NoCArc
                  '12, Vancouver, BC, Canada, December 1, 2012},
  pages        = {51--56},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2401716.2401728},
  doi          = {10.1145/2401716.2401728},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/micro/ParkC12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/RaminiB12,
  author       = {Luca Ramini and
                  Davide Bertozzi},
  editor       = {Maurizio Palesi and
                  Terrence S. T. Mak},
  title        = {Power efficiency of wavelength-routed optical NoC topologies for global
                  connectivity of 3D multi-core processors},
  booktitle    = {Fifth International Workshop on Network on Chip Architectures, NoCArc
                  '12, Vancouver, BC, Canada, December 1, 2012},
  pages        = {25--30},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2401716.2401723},
  doi          = {10.1145/2401716.2401723},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/micro/RaminiB12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/XuLPT12,
  author       = {Thomas Canhao Xu and
                  Pasi Liljeberg and
                  Juha Plosila and
                  Hannu Tenhunen},
  editor       = {Maurizio Palesi and
                  Terrence S. T. Mak},
  title        = {A high-efficiency low-cost heterogeneous 3D network-on-chip design},
  booktitle    = {Fifth International Workshop on Network on Chip Architectures, NoCArc
                  '12, Vancouver, BC, Canada, December 1, 2012},
  pages        = {37--42},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2401716.2401725},
  doi          = {10.1145/2401716.2401725},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/micro/XuLPT12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/micro/Yakovlev12,
  author       = {Alex Yakovlev},
  editor       = {Maurizio Palesi and
                  Terrence S. T. Mak},
  title        = {Developing survival instincts in computing systems},
  booktitle    = {Fifth International Workshop on Network on Chip Architectures, NoCArc
                  '12, Vancouver, BC, Canada, December 1, 2012},
  pages        = {1},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2401716.2401717},
  doi          = {10.1145/2401716.2401717},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/micro/Yakovlev12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/micro/2012nocarc,
  editor       = {Maurizio Palesi and
                  Terrence S. T. Mak},
  title        = {Fifth International Workshop on Network on Chip Architectures, NoCArc
                  '12, Vancouver, BC, Canada, December 1, 2012},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {http://dl.acm.org/citation.cfm?id=2401716},
  isbn         = {978-1-4503-1540-1},
  timestamp    = {Thu, 02 Jan 2014 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/micro/2012nocarc.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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