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@inproceedings{DBLP:conf/memsys/0003MZC024, author = {Rui Xie and Linsen Ma and Alex Zhong and Feng Chen and Tong Zhang}, title = {ZipCache: {A} {DRAM/SSD} Cache with Built-in Transparent Compression}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {116--128}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695805}, doi = {10.1145/3695794.3695805}, timestamp = {Mon, 23 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/0003MZC024.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/AlsopAIIJM24, author = {Johnathan Alsop and Shaizeen Aga and Mohamed Assem Ibrahim and Mahzabeen Islam and Nuwan Jayasena and Andrew McCrabb}, title = {PIM-Potential: Broadening the Acceleration Reach of {PIM} Architectures}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {1--12}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695795}, doi = {10.1145/3695794.3695795}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/AlsopAIIJM24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/BaroneKLCGFFT24, author = {Claudio Barone and Rishika Kushwah and Ankur Limaye and Vito Giovanni Castellana and Giovanni Gozzi and Michele Fiorito and Fabrizio Ferrandi and Antonino Tumeo}, title = {To Cache or not to Cache? Exploring the Design Space of Tunable, HLS-generated Accelerators}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {210--218}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695815}, doi = {10.1145/3695794.3695815}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/BaroneKLCGFFT24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/BranchiniLCS24, author = {Beatrice Branchini and Ian Di Dio Lavore and Vito Giovanni Castellana and Marco D. Santambrogio}, title = {Programming the Future: the Essential Role of System Topology Awareness in Heterogeneous Disaggregated Environments}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {186--191}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695811}, doi = {10.1145/3695794.3695811}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/BranchiniLCS24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/ChristS0W24, author = {Derek Christ and Lukas Steiner and Matthias Jung and Norbert Wehn}, title = {PIMSys: {A} Virtual Prototype for Processing in Memory}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {26--33}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695797}, doi = {10.1145/3695794.3695797}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/ChristS0W24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/DevulapallyHPNM24, author = {Anusha Devulapally and Mahantesh Halappanavar and Amit Puri and Vijaykrishnan Narayanan and Andres Marquez}, title = {Using Isoefficiency as a Metric to Assess Disaggregated Memory Systems for High Performance Computing}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {192--197}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695812}, doi = {10.1145/3695794.3695812}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/DevulapallyHPNM24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/FigoritoMRKGDCP24, author = {Marcus Figorito and Vincent Michelini and Benjamin Reber and Alexander H. Kneipp and Matthew Gould and Chen Ding and Linlin Chen and Dorin Patru}, title = {Implementation of a Two-Level Programmable Cache Emulation and Test System}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {140--156}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695821}, doi = {10.1145/3695794.3695821}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/FigoritoMRKGDCP24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/IbrahimA24, author = {Mohamed Assem Ibrahim and Shaizeen Aga}, title = {Pimacolaba: Collaborative Acceleration for {FFT} on Commercial Processing-In-Memory Architectures}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {13--25}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695796}, doi = {10.1145/3695794.3695796}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/IbrahimA24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/KangGKM24, author = {Yan Kang and Sayan Ghosh and Mahmut T. Kandemir and Andr{\'{e}}s M{\'{a}}rquez}, title = {Studying {CPU} and memory utilization of applications on Fujitsu {A64FX} and Nvidia Grace Superchip}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {198--207}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695813}, doi = {10.1145/3695794.3695813}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/KangGKM24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/KarimiK24, author = {Sina Karimi and Kurt Keville}, title = {A comparison of modern memory management schemes in {HPC}}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {208--209}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695814}, doi = {10.1145/3695794.3695814}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/KarimiK24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/MirGT24, author = {Waqar Hassan Mir and Neeraj Goel and Venkata Kalyan Tavva}, title = {{CARDR:} {DRAM} Cache Assisted Ransomware Detection and Recovery in SSDs}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {104--115}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695804}, doi = {10.1145/3695794.3695804}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/MirGT24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/Rajasukumar0XC24, author = {Andronicus Rajasukumar and Tianchi Zhang and Ruiqi Xu and Andrew A. Chien}, title = {UpDown: {A} Novel Architecture for Unlimited Memory Parallelism}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {61--77}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695801}, doi = {10.1145/3695794.3695801}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/Rajasukumar0XC24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/RazzakBSB24, author = {Abdur Razzak and Atanu Barai and Nandakishore Santhi and Abdel{-}Hameed A. Badawy}, title = {Static Reuse Profile Estimation for Array Applications}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {235--244}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695817}, doi = {10.1145/3695794.3695817}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/RazzakBSB24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/SaglamHFPSSP24, author = {Berk Saglam and Nam Ho and Carlos Falquez and Antoni Portero and Fabian Sch{\"{a}}tzle and Estela Suarez and Dirk Pleiter}, title = {Data Prefetching on Processors with Heterogeneous Memory}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {45--60}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695800}, doi = {10.1145/3695794.3695800}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/SaglamHFPSSP24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/ServodioL24, author = {Salvatore Servodio and Xiaoming Li}, title = {Memory Efficiency Oriented Fine-Grain Representation and Optimization of {FFT}}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {245--256}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695818}, doi = {10.1145/3695794.3695818}, timestamp = {Wed, 08 Jan 2025 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/ServodioL24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/SheridanDSLSVV024, author = {Kevin Sheridan and Jered Dominguez{-}Trujillo and Galen M. Shipman and Patrick Lavin and Christopher Scott and Agustin Vaca Valverde and Richard W. Vuduc and Jeffrey Young}, title = {A Workflow for the Synthesis of Irregular Memory Access Microbenchmarks}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {219--234}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695816}, doi = {10.1145/3695794.3695816}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/SheridanDSLSVV024.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/SinhaBDT24, author = {Prabuddha Sinha and Krishna Pratik BV and Shirshendu Das and Venkata Kalyan Tavva}, title = {{PROLONG:} Priority based Write Bypassing Technique for Longer Lifetime in {STT-RAM} based {LLC}}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {89--103}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695803}, doi = {10.1145/3695794.3695803}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/SinhaBDT24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/SuetterleinMM24, author = {Joshua Suetterlein and Joseph B. Manzano and Andres Marquez}, title = {Synchronization for {CXL} Based Memory}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {178--185}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695810}, doi = {10.1145/3695794.3695810}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/SuetterleinMM24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/SunZY024, author = {Shaotong Sun and Yifan Zhu and Xingzhi Ye and Chen Ding}, title = {Measuring Data Access Latency in Large {CPU} Caches}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {129--139}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695806}, doi = {10.1145/3695794.3695806}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/SunZY024.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/SuriyakumarTMKK24, author = {Yasodha Suriyakumar and Nathan R. Tallent and Andres Marquez and Karen L. Karavanic and Ozgur O. Kilic}, title = {MemFriend: Understanding Memory Performance with Spatial-Temporal Affinity}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {270--284}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695820}, doi = {10.1145/3695794.3695820}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/SuriyakumarTMKK24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/TirumalasettyA24, author = {Chandrahas Tirumalasetty and Narasimha Reddy Annapareddy}, title = {Contention aware {DRAM} caching for CXL-enabled pooled memory}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {157--171}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695808}, doi = {10.1145/3695794.3695808}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/TirumalasettyA24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/TroutL24, author = {Robert Trout and David Lynch}, title = {Sadram Arithmetic in {C++}}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {34--37}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695798}, doi = {10.1145/3695794.3695798}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/TroutL24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/VermaS24, author = {Samiksha Verma and Virendra Singh}, title = {{SMS:} Solving Many-sided RowHammer}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {78--88}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695802}, doi = {10.1145/3695794.3695802}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/VermaS24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/WilbertWT24, author = {Nils Wilbert and Stefan Wildermann and J{\"{u}}rgen Teich}, title = {Hybrid Cache Design Under Varying Power Supply Stability - {A} Comparative Study}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {257--269}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695819}, doi = {10.1145/3695794.3695819}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/WilbertWT24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/WuLKG0M24, author = {Jianbo Wu and Jie Liu and Gokcen Kestor and Roberto Gioiosa and Dong Li and Andres Marquez}, title = {Performance Study of {CXL} Memory Topology}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {172--177}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695809}, doi = {10.1145/3695794.3695809}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/WuLKG0M24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/YangKSSWLB24, author = {Lita Yang and Changjung Kao and Sriseshan Srikanth and Huseyin Ekin Sumbul and Tony F. Wu and Huichu Liu and Edith Beign{\'{e}}}, title = {Characterization and Design of 3D-Stacked Memory for Image Signal Processing on {AR/VR} Devices}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, pages = {38--44}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794.3695799}, doi = {10.1145/3695794.3695799}, timestamp = {Sun, 22 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/YangKSSWLB24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/memsys/2024, title = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2024, Washington, DC, USA, 30 September 2024 - 3 October 2024}, publisher = {{ACM}}, year = {2024}, url = {https://doi.org/10.1145/3695794}, doi = {10.1145/3695794}, isbn = {979-8-4007-1091-9}, timestamp = {Mon, 16 Dec 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/2024.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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