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export results for "toc:db/conf/coolchips/coolchips2018.bht:"
@inproceedings{DBLP:conf/coolchips/0001LEK18, author = {Masayuki Sato and Zehua Li and Ryusuke Egawa and Hiroaki Kobayashi}, title = {An energy-aware set-level refreshing mechanism for eDRAM last-level caches}, booktitle = {2018 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS} 2018, Yokohama, Japan, April 18-20, 2018}, pages = {1--3}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/CoolChips.2018.8373082}, doi = {10.1109/COOLCHIPS.2018.8373082}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/coolchips/0001LEK18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/coolchips/BahouKACB18, author = {Andrawes Al Bahou and Geethan Karunaratne and Renzo Andri and Lukas Cavigelli and Luca Benini}, title = {{XNORBIN:} {A} 95 TOp/s/W hardware accelerator for binary convolutional neural networks}, booktitle = {2018 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS} 2018, Yokohama, Japan, April 18-20, 2018}, pages = {1--3}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/CoolChips.2018.8373076}, doi = {10.1109/COOLCHIPS.2018.8373076}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/coolchips/BahouKACB18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/coolchips/CoustansCFTSEK18, author = {Mathieu Coustans and Abdelkarim Cherkaoui and Laurent Fesquet and Christian Terrier and Stephanie Salgado and Thomas Eberhardt and Maher Kayal}, title = {Subthreshold logic for low-area and energy efficient true random number generator}, booktitle = {2018 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS} 2018, Yokohama, Japan, April 18-20, 2018}, pages = {1--3}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/CoolChips.2018.8373081}, doi = {10.1109/COOLCHIPS.2018.8373081}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/coolchips/CoustansCFTSEK18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/coolchips/DiamantopoulosG18, author = {Dionysios Diamantopoulos and Heiner Giefers and Christoph Hagleitner}, title = {ecTALK: Energy efficient coherent transprecision accelerators - The bidirectional long short-term memory neural network case}, booktitle = {2018 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS} 2018, Yokohama, Japan, April 18-20, 2018}, pages = {1--3}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/CoolChips.2018.8373077}, doi = {10.1109/COOLCHIPS.2018.8373077}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/coolchips/DiamantopoulosG18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/coolchips/HagiwaraHKAENTN18, author = {Kesami Hagiwara and Tomoichi Hayashi and Shumpei Kawasaki and Fumio Arakawa and Oleg Endo and Hayato Nomura and Akira Tsukamoto and Duong Nguyen and Binh Nguyen and Anh Tran and Hoan Hyunh and Ikuo Kudoh and Cong{-}Kha Pham}, title = {A two-stage-pipeline {CPU} of {SH-2} architecture implemented on {FPGA} and SoC for IoT, edge {AI} and robotic applications}, booktitle = {2018 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS} 2018, Yokohama, Japan, April 18-20, 2018}, pages = {1--3}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/CoolChips.2018.8373084}, doi = {10.1109/COOLCHIPS.2018.8373084}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/coolchips/HagiwaraHKAENTN18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/coolchips/IchikuraYKZN18, author = {Takahiro Ichikura and Ryusuke Yamano and Yuma Kikutani and Renyuan Zhang and Yasuhiko Nakashima}, title = {{EMAXVR:} {A} programmable accelerator employing near {ALU} utilization to {DSA}}, booktitle = {2018 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS} 2018, Yokohama, Japan, April 18-20, 2018}, pages = {1--3}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/CoolChips.2018.8373078}, doi = {10.1109/COOLCHIPS.2018.8373078}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/coolchips/IchikuraYKZN18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/coolchips/InoueAMNO018, author = {Koji Inoue and Takuya Araki and Takumi Maruyama and Pritish Narayanan and Takashi Oshima and Martin Schulz}, title = {Panel discussions: "Challenges to the scaling limits: How can we achieve sustainable power-performance improvements?"}, booktitle = {2018 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS} 2018, Yokohama, Japan, April 18-20, 2018}, pages = {1--2}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/CoolChips.2018.8373075}, doi = {10.1109/COOLCHIPS.2018.8373075}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/coolchips/InoueAMNO018.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/coolchips/KazamiOA18, author = {Ryosuke Kazami and Hayate Okuhara and Hideharu Amano}, title = {Design automation methodology of a critical path monitor for adaptive voltage controls}, booktitle = {2018 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS} 2018, Yokohama, Japan, April 18-20, 2018}, pages = {1--3}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/CoolChips.2018.8373073}, doi = {10.1109/COOLCHIPS.2018.8373073}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/coolchips/KazamiOA18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/coolchips/OdajimaKS18, author = {Tetsuya Odajima and Yuetsu Kodama and Mitsuhisa Sato}, title = {Power performance analysis of {ARM} scalable vector extension}, booktitle = {2018 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS} 2018, Yokohama, Japan, April 18-20, 2018}, pages = {1--3}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/CoolChips.2018.8373083}, doi = {10.1109/COOLCHIPS.2018.8373083}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/coolchips/OdajimaKS18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/coolchips/PangraciousDT18, author = {Vinod Pangracious and Ranjitha Dash and Ashok Kumar Turuk}, title = {3D-cool: Design and development of adaptive thermal-aware three-dimensional NoC-based multiprocessor chip}, booktitle = {2018 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS} 2018, Yokohama, Japan, April 18-20, 2018}, pages = {1--3}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/CoolChips.2018.8373074}, doi = {10.1109/COOLCHIPS.2018.8373074}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/coolchips/PangraciousDT18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/coolchips/TanabeKSM18, author = {Ken Tanabe and Hiroshi Kubota and Akihide Sai and Nobu Matsumoto}, title = {Data selection and de-noising based on reliability for long-range and high-pixel resolution LiDAR}, booktitle = {2018 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS} 2018, Yokohama, Japan, April 18-20, 2018}, pages = {1--3}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/CoolChips.2018.8373079}, doi = {10.1109/COOLCHIPS.2018.8373079}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/coolchips/TanabeKSM18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/coolchips/UetakeZNN18, author = {Noriyuki Uetake and Renyuan Zhang and Takashi Nakada and Yasuhiko Nakashima}, title = {A programmable analog calculation unit for vector computations}, booktitle = {2018 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS} 2018, Yokohama, Japan, April 18-20, 2018}, pages = {1--3}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://doi.org/10.1109/CoolChips.2018.8373080}, doi = {10.1109/COOLCHIPS.2018.8373080}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/coolchips/UetakeZNN18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/coolchips/2018, title = {2018 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS} 2018, Yokohama, Japan, April 18-20, 2018}, publisher = {{IEEE} Computer Society}, year = {2018}, url = {https://ieeexplore.ieee.org/xpl/conhome/8369044/proceeding}, isbn = {978-1-5386-6103-1}, timestamp = {Wed, 16 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/coolchips/2018.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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