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@inproceedings{DBLP:conf/dcis/Alonso0JMB23,
author = {Sara Alonso and
Jes{\'{u}}s L{\'{a}}zaro and
Jaime Jim{\'{e}}nez and
Leire Muguira and
Unai Bidarte},
title = {Timing requirements on multi-processing and reconfigurable embedded
systems with multiple environments},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335983},
doi = {10.1109/DCIS58620.2023.10335983},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Alonso0JMB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AndjelkovicSBK23,
author = {Marko S. Andjelkovic and
Oliver Schrape and
Anselm Breitenreiter and
Milos Krstic},
title = {{SET} and {SEU} Hardened Clock Gating Cell},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335985},
doi = {10.1109/DCIS58620.2023.10335985},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/AndjelkovicSBK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AstarloaF0IS23,
author = {Armando Astarloa and
Pedro Fern{\'{a}}ndez and
Jes{\'{u}}s L{\'{a}}zaro and
Mikel Idirin and
Sergio Salas},
title = {Time-Sensitive Networking to meet Hard-real Time Boundaries on Edge
Intelligence Applications},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10336008},
doi = {10.1109/DCIS58620.2023.10336008},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/AstarloaF0IS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AsuncionH23,
author = {Samuel L{\'{o}}pez Asunci{\'{o}}n and
Pablo Ituero Herrero},
title = {Flexible Deep-pipelined FPGA-based Accelerator for Spiking Neural
Networks},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335964},
doi = {10.1109/DCIS58620.2023.10335964},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/AsuncionH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/BarbaRPRG23,
author = {Pedro Barba and
Alberto Rodr{\'{\i}}guez{-}P{\'{e}}rez and
Enrique Prefasi and
Roc{\'{\i}}o del R{\'{\i}}o and
Oscar Guerra},
title = {{ADC} Architectural Study for Digitally-Assisted Multi-Gigabit Data
Communication Transceivers},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--5},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335974},
doi = {10.1109/DCIS58620.2023.10335974},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/BarbaRPRG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/BautistaG23,
author = {V{\'{\i}}ctor Manuel Bautista and
Mario Garrido},
title = {An Automatic Generator of Non-Power-of-Two {SDF} {FFT} Architectures
for 5G and Beyond},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10336004},
doi = {10.1109/DCIS58620.2023.10336004},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/BautistaG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Beloso-LegarraL23,
author = {Javier Beloso{-}Legarra and
Antonio Lopez{-}Martin and
Carlos Aristoteles De la Cruz and
Alfio Dario Grasso and
Gaetano Palumbo and
Salvatore Pennisi},
title = {{GBW} Optimization in Two-Stage OTAs Operating in Weak Inversion},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--4},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335968},
doi = {10.1109/DCIS58620.2023.10335968},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Beloso-LegarraL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/BotaBTPVP023,
author = {Sebasti{\`{a}} A. Bota and
Salvador Barcel{\'{o}} and
Gabriel Torrens and
Rafel Perell{\'{o}} and
Jaume Verd and
Ivan de Pa{\'{u}}l and
Jaume Segura},
title = {A Compact Double-Exponential Circuit for Single Event Transient Emulation},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335967},
doi = {10.1109/DCIS58620.2023.10335967},
timestamp = {Mon, 10 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/BotaBTPVP023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/BrunJCGF23,
author = {Marine Brun and
Gilles Jacquemod and
Yoann Charlon and
Arnaud Gamet and
Philippe Le Fevre},
title = {A Two-Stage Amplifier in a Low Power 32.768 kHz Quartz Crystal Oscillator},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335971},
doi = {10.1109/DCIS58620.2023.10335971},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/BrunJCGF23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Camacho-RuizSMT23,
author = {Eros Camacho{-}Ruiz and
Santiago S{\'{a}}nchez{-}Solano and
Macarena C. Mart{\'{\i}}nez{-}Rodr{\'{\i}}guez and
Erica Tena{-}S{\'{a}}nchez and
Piedad Brox},
title = {A Simple Power Analysis of an {FPGA} implementation of a polynomial
multiplier for the {NTRU} cryptosystem},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10336001},
doi = {10.1109/DCIS58620.2023.10336001},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Camacho-RuizSMT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Castells-RufasM23,
author = {David Castells{-}Rufas and
Xavier Martorell and
Aleix Roca and
Alexander Kropotov and
Xavier Teruel and
Teresa Cervero and
John D. Davis},
title = {Ethernet Emulation over PCIe for {RISC-V} Software Development Vehicles},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335994},
doi = {10.1109/DCIS58620.2023.10335994},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Castells-RufasM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/CireraM0GCV23,
author = {Albert Cirera and
Pere Llu{\'{\i}}s Miribel{-}Catal{\`{a}} and
Antonio Rubio and
Blas Garrido and
Jordi Colomer{-}Farrarons and
Ioannis Vourkas},
title = {Using Current to Drive Two {SDC} Memristors Connected in Series and
in Anti-Series},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--5},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335996},
doi = {10.1109/DCIS58620.2023.10335996},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/CireraM0GCV23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/CuberoMAHVU23,
author = {Miguel Cubero and
David Molt{\'{o}} and
Elena Aparicio{-}Esteve and
{\'{A}}lvaro Hern{\'{a}}ndez and
Jos{\'{e}} Manuel Villadangos and
Jes{\'{u}}s Ure{\~{n}}a},
title = {High-Rate Acquisition System for an Infrared {LPS}},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335982},
doi = {10.1109/DCIS58620.2023.10335982},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/CuberoMAHVU23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/DionizioSS23,
author = {Anderson Aparecido Dionizio and
Leonardo Poltronieri Sampaio and
S{\'{e}}rgio Augusto Oliveira da Silva},
title = {Integrated Cuk Inverter for Single-Phase Grid-Tied Photovoltaic System},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335981},
doi = {10.1109/DCIS58620.2023.10335981},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/DionizioSS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/DoblasCCDE0HJKL23,
author = {Max Doblas and
Gerard Cand{\'{o}}n and
Xavier Carril and
Marc Dom{\'{\i}}nguez and
Enric Erra and
Alberto Gonz{\'{a}}lez and
C{\'{e}}sar Hern{\'{a}}ndez and
V{\'{\i}}ctor Jim{\'{e}}nez and
Vatistas Kostalampros and
Rub{\'{e}}n Langarita and
Neiel Leyva and
Guillem L{\'{o}}pez{-}Parad{\'{\i}}s and
Jonnatan Mendoza and
Josep Oltra and
Juli{\'{a}}n Pav{\'{o}}n and
Crist{\'{o}}bal Ram{\'{\i}}rez and
Narc{\'{\i}}s Rodas and
Enrico Reggiani and
Mario Rodr{\'{\i}}guez and
Carlos Rojas and
Abraham Ruiz and
Hugo Safadi and
V{\'{\i}}ctor Soria and
Alejandro Suanes and
Iv{\'{a}}n Vargas and
Fernando Arreza and
Roger Figueras and
Pau Fontova{-}Must{\'{e}} and
Joan Marimon and
Ricardo Mart{\'{\i}}nez and
Sergio Moreno and
Jordi Sacrist{\'{a}}n and
Oscar Alonso and
Xavier Aragon{\`{e}}s and
Adri{\'{a}}n Cristal and
{\'{A}}ngel Di{\'{e}}guez and
Manuel L{\'{o}}pez and
Diego Mateo and
Francesc Moll and
Miquel Moret{\'{o}} and
Oscar Palomar and
Marco A. Ram{\'{\i}}rez and
Francisco Serra{-}Graells and
Nehir S{\"{o}}nmez and
Llu{\'{\i}}s Ter{\'{e}}s and
Osman S. Unsal and
Mateo Valero and
Luis Villa},
title = {Sargantana: An Academic SoC {RISC-V} Processor in 22nm {FDSOI} Technology},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335976},
doi = {10.1109/DCIS58620.2023.10335976},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/DoblasCCDE0HJKL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/EnerizMCA23,
author = {Daniel En{\'{e}}riz and
Nicol{\'{a}}s Medrano and
Bel{\'{e}}n Calvo and
Diego Antol{\'{\i}}n},
title = {Low-power EEGNet-based Brain-Computer Interface implemented on an
Arduino Nano 33 Sense},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--5},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335978},
doi = {10.1109/DCIS58620.2023.10335978},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/EnerizMCA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/FrasserMCF00R23,
author = {Christiam F. Frasser and
Alejandro Mor{\'{a}}n and
Vincent Canals and
Joan Font and
Eugeni Isern and
Miquel Roca and
Josep L. Rossell{\'{o}}},
title = {Approximate arithmetic aware training for stochastic computing neural
networks},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10336002},
doi = {10.1109/DCIS58620.2023.10336002},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/FrasserMCF00R23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Galan-PradoF0R23,
author = {Fabio Gal{\'{a}}n{-}Prado and
Joan Font{-}Rossell{\'{o}} and
Miquel Roca and
Josep L. Rossell{\'{o}}},
title = {Stochastic Computing-based on-chip Training Circuitry for Reservoir
Computing Systems},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10336006},
doi = {10.1109/DCIS58620.2023.10336006},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Galan-PradoF0R23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Galeas-MerchanC23,
author = {Jos{\'{e}}{-}Miguel Galeas{-}Merch{\'{a}}n and
Jos{\'{e}}{-}Borja Castillo{-}S{\'{a}}nchez and
Mart{\'{\i}}n Gonz{\'{a}}lez{-}Garc{\'{\i}}a},
title = {Simplifying {RTL} design and verification in chip manufacturing: {A}
paradigm for Electronics Teaching using Open-Source tools},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335966},
doi = {10.1109/DCIS58620.2023.10335966},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Galeas-MerchanC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/HernandezCHGG23,
author = {Selenia Mar{\'{\i}}a Medina Hern{\'{a}}ndez and
Pedro P. Carballo and
Pedro Hern{\'{a}}ndez{-}Fern{\'{a}}ndez and
David S. Miranda Guill{\'{e}}n and
Sergio Gonz{\'{a}}lez},
title = {SoC FPGA-based Multichannel Data Acquisition System with Linux-Baremetal
{AMP} for Applications in the Field of Astrophysics},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335975},
doi = {10.1109/DCIS58620.2023.10335975},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/HernandezCHGG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/HernandezL23,
author = {Ignacio Amat Hern{\'{a}}ndez and
Juan A. L{\'{o}}pez},
title = {Any-Radix Efficient Fully-Parallel Implementation of the Fast Fourier
Transform on FPGAs},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335987},
doi = {10.1109/DCIS58620.2023.10335987},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/HernandezL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Hormigo-Jimenez23,
author = {Marco Hormigo{-}Jim{\'{e}}nez and
Javier Hormigo},
title = {High-Throughput {DTW} accelerator with minimum area in {AMD} {FPGA}
by {HLS}},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335963},
doi = {10.1109/DCIS58620.2023.10335963},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Hormigo-Jimenez23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/KarmakarSMB23,
author = {Apurba Karmakar and
Santiago S{\'{a}}nchez{-}Solano and
Macarena C. Mart{\'{\i}}nez{-}Rodr{\'{\i}}guez and
Piedad Brox},
title = {{HW/SW} implementation of {RSA} digital signature on a RISC-V-based
System-on-Chip},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335970},
doi = {10.1109/DCIS58620.2023.10335970},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/KarmakarSMB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Lopez-Villellas23,
author = {Lori{\'{e}}n L{\'{o}}pez{-}Villellas and
Esteve Pineda{-}S{\'{a}}nchez and
Asaf Badouh and
Santiago Marco{-}Sola and
Pablo Ib{\'{a}}{\~{n}}ez and
Jes{\'{u}}s Alastruey{-}Bened{\'{e}} and
Miquel Moret{\'{o}}},
title = {{RISC-V} for Genome Data Analysis: Opportunities and Challenges},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335997},
doi = {10.1109/DCIS58620.2023.10335997},
timestamp = {Sat, 13 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Lopez-Villellas23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MartinDTHN23,
author = {Jorge Mart{\'{\i}}n and
Laura de Diego and
Miguel Tapiador and
{\'{A}}lvaro Hern{\'{a}}ndez and
Rub{\'{e}}n Nieto},
title = {Comparative Analysis of Neural Network Implementations for {NILM}
Applications},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335986},
doi = {10.1109/DCIS58620.2023.10335986},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MartinDTHN23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MedranoAEC23,
author = {Nicol{\'{a}}s Medrano and
Diego Antol{\'{\i}}n and
Daniel En{\'{e}}riz and
Bel{\'{e}}n Calvo},
title = {High Resolution Current Measurement Using {TMR} Sensors},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--5},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10336007},
doi = {10.1109/DCIS58620.2023.10336007},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MedranoAEC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MoltoCAHVU23,
author = {David Molt{\'{o}} and
Miguel Cubero and
Elena Aparicio{-}Esteve and
{\'{A}}lvaro Hern{\'{a}}ndez and
Jose M. Villadangos and
Jes{\'{u}}s Ure{\~{n}}a},
title = {Definition of a SoC Architecture for a High-Rate Correlator Bank},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335998},
doi = {10.1109/DCIS58620.2023.10335998},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MoltoCAHVU23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MoussaGLIPBF23,
author = {Hasan Moussa and
Jessica Gonsalves and
Estelle Lauga{-}Larroze and
Sana Ibrahim and
Florence Podevin and
Sylvain Bourdel and
Laurent Fesquet},
title = {Making Digital N-Path Mixers},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--5},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335999},
doi = {10.1109/DCIS58620.2023.10335999},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MoussaGLIPBF23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MullerMB23,
author = {Roland M{\"{u}}ller and
Loreto Mateu and
Ralf Brederlow},
title = {Analog/Mixed-Signal Standard Cell Based Approach for Automated Circuit
Generation of Neural Network Accelerators},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335979},
doi = {10.1109/DCIS58620.2023.10335979},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MullerMB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/NavarroNFHAB23,
author = {V{\'{\i}}ctor M. Navarro and
Rub{\'{e}}n Nieto and
Pedro R. Fern{\'{a}}ndez and
{\'{A}}lvaro Hern{\'{a}}ndez and
Antonio J. del Ama and
Susana Borromeo},
title = {SoC Architecture for Acquisition and Processing of {EMG} Signals},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335993},
doi = {10.1109/DCIS58620.2023.10335993},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/NavarroNFHAB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Ortiz-RamirezCL23,
author = {Isabel Ort{\'{\i}}z{-}Ram{\'{\i}}rez and
Luis A. Camu{\~{n}}as{-}Mesa and
Bernab{\'{e}} Linares{-}Barranco and
Teresa Serrano{-}Gotarredona},
title = {Study of foveation mechanisms in Dynamic Vision Sensors},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335984},
doi = {10.1109/DCIS58620.2023.10335984},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Ortiz-RamirezCL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Pacheco-Sanchez23,
author = {Anibal Pacheco{-}Sanchez and
Javier No{\'{e}} Ramos{-}Silva and
Nikolaos Mavredakis and
Eloy Ram{\'{\i}}rez{-}Garc{\'{\i}}a and
David Jim{\'{e}}nez},
title = {Design of GFET-based active modulators leveraging device performance
reproducibility conditions},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335972},
doi = {10.1109/DCIS58620.2023.10335972},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Pacheco-Sanchez23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Paez-MontoroPLL23,
author = {Alba P{\'{a}}ez{-}Montoro and
Javier De Mena Pacheco and
Marisa L{\'{o}}pez{-}Vallejo and
Celia L{\'{o}}pez{-}Ongil and
Susana Pat{\'{o}}n},
title = {Ring Oscillator Circuits in Flexible aIGZO Technology for Biosignal
Acquisition},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335991},
doi = {10.1109/DCIS58620.2023.10335991},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Paez-MontoroPLL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/PazG23,
author = {Pedro Paz and
Mario Garrido},
title = {A 5.2-GS/s 8-Parallel 1024-Point {MDC} {FFT}},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335965},
doi = {10.1109/DCIS58620.2023.10335965},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/PazG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Perez-BailonCS23,
author = {Jorge P{\'{e}}rez{-}Bail{\'{o}}n and
Santiago Celma and
Carlos S{\'{a}}nchez{-}Azqueta},
title = {{CMOS} Transistor Array for Cryogenic Temperature Characterization
of {MOS} Components},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--5},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335905},
doi = {10.1109/DCIS58620.2023.10335905},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Perez-BailonCS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/PosadasVV23,
author = {H{\'{e}}ctor Posadas and
Jos{\'{e}} Luis V{\'{a}}zquez and
Eugenio Villar},
title = {Automatic code generation from {UML} for data memory optimization
in microcontrollers},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335980},
doi = {10.1109/DCIS58620.2023.10335980},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/PosadasVV23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/QuintanaCB23,
author = {Gabriel Santana Quintana and
Pedro P. Carballo and
Carlos Betancor},
title = {Design of SoC {FPGA} based controller to reduce shadow effects in
photovoltaic installations},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335995},
doi = {10.1109/DCIS58620.2023.10335995},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/QuintanaCB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Ramirez-Barcenas23,
author = {Alberto Ram{\'{\i}}rez{-}B{\'{a}}rcenas and
Mario Garc{\'{\i}}a{-}Valderas and
Celia L{\'{o}}pez{-}Ongil},
title = {Design Space Analysis for a Digital Lock-In Amplifier for Infrared
Gas Sensor Signal Acquisition},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335988},
doi = {10.1109/DCIS58620.2023.10335988},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Ramirez-Barcenas23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/ReyesSLM23,
author = {Andr{\'{e}}s Fernando Serrano Reyes and
Mar{\'{\i}}a Teresa Sanz{-}Pascual and
Bel{\'{e}}n Calvo L{\'{o}}pez and
Nicol{\'{a}}s Medrano},
title = {Three-Stage Low Dropout Regulator with Enhanced Transient Response
and Regulation Performance},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--5},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10336000},
doi = {10.1109/DCIS58620.2023.10336000},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/ReyesSLM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Ruiz-BeltranRGR23,
author = {Camilo A. Ruiz{-}Beltr{\'{a}}n and
Adri{\'{a}}n Romero{-}Garc{\'{e}}s and
M. Gonz{\'{a}}lez and
J. A. Rodr{\'{\i}}guez and
Antonio Bandera and
Antonio S{\'{a}}nchez{-}Pedraza},
title = {Real-time iris image quality evaluation implemented in Ultrascale
MPSoC},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10336005},
doi = {10.1109/DCIS58620.2023.10336005},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Ruiz-BeltranRGR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Sanchez-FloresA23,
author = {Alejandra Sanchez{-}Flores and
Lluc Alvarez and
Bartomeu Alorda{-}Ladaria},
title = {Accelerators in Embedded Systems for Machine Learning: {A} {RISCV}
View},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335969},
doi = {10.1109/DCIS58620.2023.10335969},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Sanchez-FloresA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SkrzypczakZWFVP23,
author = {Simon Skrzypczak and
Di Zhou and
Wei Wei and
Dalal Fadil and
Dominique Vignaud and
Emiliano Pallecchi and
Henri Happy},
title = {Devices and circuits for {HF} applications based on 2D materials},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--5},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335977},
doi = {10.1109/DCIS58620.2023.10335977},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/SkrzypczakZWFVP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Soler-Fernandez23,
author = {Juan Luis Soler{-}Fern{\'{a}}ndez and
Omar Romera and
{\'{A}}ngel Di{\'{e}}guez and
Joan Daniel Prades and
Oscar Alonso},
title = {An ultra-low power custom IoT node for gas sensing applications},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335990},
doi = {10.1109/DCIS58620.2023.10335990},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Soler-Fernandez23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SuarezP023,
author = {Daniel Su{\'{a}}rez and
H{\'{e}}ctor Posadas and
V{\'{\i}}ctor Fern{\'{a}}ndez},
title = {UML-Based Design Flow for Systems with Neural Networks},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335992},
doi = {10.1109/DCIS58620.2023.10335992},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/SuarezP023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/TapiadorDHN23,
author = {Miguel Tapiador and
Laura de Diego{-}Ot{\'{o}}n and
{\'{A}}lvaro Hern{\'{a}}ndez and
Rub{\'{e}}n Nieto},
title = {Implementing a {CNN} in {FPGA} Programmable Logic for {NILM} Application},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335989},
doi = {10.1109/DCIS58620.2023.10335989},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/TapiadorDHN23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/TorneroRMF23,
author = {Rafael Tornero and
David Rodriguez and
Jos{\'{e}} Maria Mart{\'{\i}}nez and
Jos{\'{e}} Flich},
title = {An Open-Source {FPGA} Platform for Shared-Memory Heterogeneous Many-Core
Architecture Exploration},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335973},
doi = {10.1109/DCIS58620.2023.10335973},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/TorneroRMF23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Zuniga-Gonzalez23,
author = {Virginia Z{\'{u}}{\~{n}}iga{-}Gonz{\'{a}}lez and
Erica Tena{-}S{\'{a}}nchez and
Antonio J. Acosta},
title = {A Security Comparison between {AES-128} and {AES-256} {FPGA} implementations
against {DPA} attacks},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10336003},
doi = {10.1109/DCIS58620.2023.10336003},
timestamp = {Tue, 09 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Zuniga-Gonzalez23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/dcis/2023,
title = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023},
doi = {10.1109/DCIS58620.2023},
isbn = {979-8-3503-0385-8},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/2023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AlheyasatTBA22,
author = {Abdel Alheyasat and
Gabriel Torrens and
Sebasti{\`{a}} A. Bota and
Bartomeu Alorda},
title = {SRAM-cells Reproducibility Metrics for Physical Unclonable Function
Applications},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970171},
doi = {10.1109/DCIS55711.2022.9970171},
timestamp = {Mon, 10 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AlheyasatTBA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AlonsoLJMB22,
author = {Sara Alonso and
Jes{\'{u}}s L{\'{a}}zaro and
Jaime Jim{\'{e}}nez and
Leire Muguira and
Unai Bidarte},
title = {The influence of virtualization on real-time systems' interrupts in
embedded SoC platforms},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970041},
doi = {10.1109/DCIS55711.2022.9970041},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/AlonsoLJMB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AranaRGL22,
author = {I{\~{n}}igo Mikel Lasaga Arana and
Alberto Ram{\'{\i}}rez{-}B{\'{a}}rcenas and
Mario Garc{\'{\i}}a{-}Valderas and
Celia L{\'{o}}pez{-}Ongil},
title = {Low Power Consumption Online Testing Technique for Wearable Wireless
Body Area Networks},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970190},
doi = {10.1109/DCIS55711.2022.9970190},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/AranaRGL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AsuncionILG22,
author = {Samuel L{\'{o}}pez Asunci{\'{o}}n and
Pablo Ituero and
Marisa L{\'{o}}pez{-}Vallejo and
Jes{\'{u}}s Grajal},
title = {Data Synchronization in Non-Uniform Latency Custom {DSP} Designs},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970167},
doi = {10.1109/DCIS55711.2022.9970167},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AsuncionILG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/BarriosNGLS22,
author = {Yubal Barrios and
Rom{\'{e}}n Neris and
Ra{\'{u}}l Guerra and
Sebasti{\'{a}}n L{\'{o}}pez and
Roberto Sarmiento},
title = {Speeding up {FPGA} Prototyping on Space Programs with {HLS} Workflow.
Use Case: Video Compression On-board Satellites},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970056},
doi = {10.1109/DCIS55711.2022.9970056},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/BarriosNGLS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Beloso-LegarraC22,
author = {Javier Beloso{-}Legarra and
Carlos Aristoteles De la Cruz{-}Blas and
Antonio J. L{\'{o}}pez{-}Mart{\'{\i}}n},
title = {Single-Stage Class-AB Non-Linear Current Mirror {OTA}},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970198},
doi = {10.1109/DCIS55711.2022.9970198},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Beloso-LegarraC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/BerruetaAPHUSVF22,
author = {Alberto Berrueta and
Jos{\'{e}} Javier Astrain and
Guillermo Puy and
Ismail El Hamzaoui and
Alfredo Urs{\'{u}}a and
Pablo Sanchis and
Jes{\'{u}}s E. Villadangos and
Francisco Falcone and
Antonio Lopez{-}Martin and
Ignacio R. Mat{\'{\i}}as},
title = {Smart Charging Station with Photovoltaic and Energy Storage for Supplying
Electric Buses},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970042},
doi = {10.1109/DCIS55711.2022.9970042},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/BerruetaAPHUSVF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/CaboCCDDGHJKLLL22,
author = {Guillem Cabo and
Gerard Cand{\'{o}}n and
Xavier Carril and
Max Doblas and
Marc Dom{\'{\i}}nguez and
Alberto Gonz{\'{a}}lez and
C{\'{e}}sar Hern{\'{a}}ndez and
V{\'{\i}}ctor Jim{\'{e}}nez and
Vatistas Kostalampros and
Rub{\'{e}}n Langarita and
Neiel Leyva and
Guillem L{\'{o}}pez{-}Parad{\'{\i}}s and
Jonnatan Mendoza and
Francesco Minervini and
Juli{\'{a}}n Pav{\'{o}}n and
Crist{\'{o}}bal Ram{\'{\i}}rez and
Narc{\'{\i}}s Rodas and
Enrico Reggiani and
Mario Rodr{\'{\i}}guez and
Carlos Rojas and
Abraham Ruiz and
V{\'{\i}}ctor Soria and
Alejandro Suanes and
Iv{\'{a}}n Vargas and
Roger Figueras and
Pau Fontova and
Joan Marimon and
V{\'{\i}}ctor Montabes and
Adri{\'{a}}n Cristal and
Carles Hern{\'{a}}ndez and
Ricardo Mart{\'{\i}}nez and
Miquel Moret{\'{o}} and
Francesc Moll and
Oscar Palomar and
Marco A. Ram{\'{\i}}rez and
Antonio Rubio and
Jordi Sacrist{\'{a}}n and
Francisco Serra{-}Graells and
Nehir S{\"{o}}nmez and
Llu{\'{\i}}s Ter{\'{e}}s and
Osman S. Unsal and
Mateo Valero and
Lu{\'{\i}}s Villa},
title = {{DVINO:} {A} {RISC-V} Vector Processor Implemented in 65nm Technology},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970128},
doi = {10.1109/DCIS55711.2022.9970128},
timestamp = {Mon, 25 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/CaboCCDDGHJKLLL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/CanalsFMPSBWD22,
author = {Joan Canals and
Nil Franch and
Victor Moro and
Joan Daniel Prades and
Georg Sch{\"{o}}ttler and
Steffen Bornemann and
Andreas Waag and
{\'{A}}ngel Di{\'{e}}guez},
title = {High-Speed 512x512 18 {\(\mu\)}m-Pitch Array {CMOS} Backplane for
GaN-based Microdisplay},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970075},
doi = {10.1109/DCIS55711.2022.9970075},
timestamp = {Sun, 15 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/CanalsFMPSBWD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/DingT22,
author = {Ruochen Ding and
William Tatinian},
title = {Hierarchical Modeling of 868MHz Wake-up Radio in OMNeT++},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970153},
doi = {10.1109/DCIS55711.2022.9970153},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/DingT22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/DomingosS22,
author = {Diogo Domingos and
Marcelino Santos},
title = {Asynchronous Controller Design and Simulation Using Signal Transition
Graphs},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970038},
doi = {10.1109/DCIS55711.2022.9970038},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/DomingosS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/EnerizMCHA22,
author = {Daniel En{\'{e}}riz and
Nicol{\'{a}}s Medrano and
Bel{\'{e}}n Calvo and
Ana Caren Hernandez{-}Ruiz and
Diego Antol{\'{\i}}n},
title = {Real-Time {EEG} Acquisition System for FPGA-based {BCI}},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--5},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970028},
doi = {10.1109/DCIS55711.2022.9970028},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/EnerizMCHA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/FernandezJAIS22,
author = {Pedro Fern{\'{a}}ndez and
Jaime Jim{\'{e}}nez and
Armando Astarloa and
Mikel Idirin and
Sergio Salas},
title = {Accelerating Video Analytic Processing on Edge Intelligence},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970152},
doi = {10.1109/DCIS55711.2022.9970152},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/FernandezJAIS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/FernandezVR22,
author = {Carlos Fernandez and
Ioannis Vourkas and
Antonio Rubio},
title = {Design and Simulation of Peripheral Driving Circuitry for Computational
ReRAM},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970082},
doi = {10.1109/DCIS55711.2022.9970082},
timestamp = {Thu, 06 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/FernandezVR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/ForntJEFACMMR22,
author = {Jordi Fornt and
Leixin Jin and
Imanol Etxezarreta and
Pau Fontova and
Josep Altet and
Antonio Calomarde and
Enric Morancho and
Francesc Moll and
Antonio Rubio},
title = {Two examples of approximate arithmetic to reduce hardware complexity
and power consumption},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970160},
doi = {10.1109/DCIS55711.2022.9970160},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/ForntJEFACMMR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Garcia-RedondoB22,
author = {Fernando Garc{\'{\i}}a{-}Redondo and
Ali BanaGozar and
Kanishkan Vadivel and
Henk Corporaal and
Shidhartha Das},
title = {{SACA:} System-level Analog {CIM} Accelerators Simulation Framework:
Accurate Simulation of Non-Ideal Components},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970112},
doi = {10.1109/DCIS55711.2022.9970112},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Garcia-RedondoB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/GogolouKLS22,
author = {Vasiliki Gogolou and
Konstantinos Kozalakis and
Theodore Laopoulos and
Stylianos Siskos},
title = {A Triboelectric Energy Harvesting Autonomous System for Internet-of-Things
Applications},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--5},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970196},
doi = {10.1109/DCIS55711.2022.9970196},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/GogolouKLS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/GogolouKNS22,
author = {Vasiliki Gogolou and
Konstantinos Kozalakis and
Thomas Noulis and
Stylianos Siskos},
title = {Chip-Package-Board codesign Methodology for Energy Harvesting {DC-DC}
Boost Converters},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--5},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970047},
doi = {10.1109/DCIS55711.2022.9970047},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/GogolouKNS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/GogolouLS22,
author = {Vasiliki Gogolou and
Theodore Laopoulos and
Stylianos Siskos},
title = {A Wide Range Current Sensing Technique for Integrated {DC-DC} Converters},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--4},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970033},
doi = {10.1109/DCIS55711.2022.9970033},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/GogolouLS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/GonzalezB22,
author = {Florencio Manteca Gonz{\'{a}}lez and
Sergio D{\'{\i}}az de Garayo Balsategui},
title = {Energy Transition in Smart Cities: {STARDUST} Project},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--5},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970098},
doi = {10.1109/DCIS55711.2022.9970098},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/GonzalezB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/GraciaVTVV22,
author = {Dar{\'{\i}}o Su{\'{a}}rez Gracia and
Alejandro Valero and
Ruben Gran Tejero and
Mar{\'{\i}}a Villarroya{-}Gaud{\'{o}} and
V{\'{\i}}ctor Vi{\~{n}}als},
title = {peRISCVcope: {A} Tiny Teaching-Oriented {RISC-V} Interpreter},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970050},
doi = {10.1109/DCIS55711.2022.9970050},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/GraciaVTVV22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Gutierrez-Martin22,
author = {Laura Guti{\'{e}}rrez{-}Mart{\'{\i}}n and
M. J. S{\'{a}}nchez Naranjo and
Jose Angel Miranda Calero and
Celia L{\'{o}}pez{-}Ongil},
title = {An Extreme Edge Low Power Device with Wavelet-based Compression for
Physiological signals},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970154},
doi = {10.1109/DCIS55711.2022.9970154},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Gutierrez-Martin22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/JimenezANL22,
author = {Manuel Jim{\'{e}}nez Trav{\'{e}}s and
Maria Jos{\'{e}} Avedillo and
Juan N{\'{u}}{\~{n}}ez and
Bernab{\'{e}} Linares{-}Barranco},
title = {Enhancing Storage Capabilities of Oscillatory Neural Networks as Associative
Memory},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--5},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970122},
doi = {10.1109/DCIS55711.2022.9970122},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/JimenezANL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/KannariPBV22,
author = {Lotta Kannari and
Kalevi Piira and
Henri Bistr{\"{o}}m and
Terttu Vainio},
title = {Energy-data-related digital twin for office building and data centre
complex},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--5},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970040},
doi = {10.1109/DCIS55711.2022.9970040},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/KannariPBV22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/KimCK22,
author = {Seokbyum Kim and
Mujun Choi and
Juho Kim},
title = {BTI-Aware Cell Characterization based on Neural Network},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--4},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970108},
doi = {10.1109/DCIS55711.2022.9970108},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/KimCK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/KraWT22,
author = {Yehuda Kra and
Yoav Weizman and
Adam Teman},
title = {SerOpt: Transistor Sizing Algorithm and Optimization Utility for Minimizing
Soft Error Rate},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970146},
doi = {10.1109/DCIS55711.2022.9970146},
timestamp = {Sat, 04 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/KraWT22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/LaCC22,
author = {Cruz{-}Blas De La and
A. Carlos and
Juan M. Carrillo},
title = {Low-Voltage {CMOS} Bulk-Driven Buffer With Bootstrapping Technique
for Gain Enhancement and THD-Noise Reduction},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--4},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970114},
doi = {10.1109/DCIS55711.2022.9970114},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/LaCC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MahboubiAGRM22,
author = {V. Mahboubi and
Daniel Arum{\'{\i}} and
{\'{A}}lvaro G{\'{o}}mez{-}Pau and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Salvador Manich},
title = {On the Fitting and Improvement of {RRAM} Stanford-Based Model Parameters
Using TiN/Ti/HfO2/W Experimental Data},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970051},
doi = {10.1109/DCIS55711.2022.9970051},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MahboubiAGRM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MaldonadoJRGC22,
author = {David Maldonado and
Francisco Jim{\'{e}}nez{-}Molinos and
Juan Bautista Rold{\'{a}}n and
M. B. Gonz{\'{a}}lez and
Francesca Campabadal},
title = {An enhanced Verilog-A compact model for bipolar RRAMs including transient
thermal effects and series resistance},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970163},
doi = {10.1109/DCIS55711.2022.9970163},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MaldonadoJRGC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MallasenMBBPP22,
author = {David Mallas{\'{e}}n and
Raul Murillo and
Alberto A. Del Barrio and
Guillermo Botella and
Luis Pi{\~{n}}uel and
Manuel Prieto{-}Mat{\'{\i}}as},
title = {Customizing the {CVA6} {RISC-V} Core to Integrate Posit and Quire
Instructions},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970026},
doi = {10.1109/DCIS55711.2022.9970026},
timestamp = {Sun, 15 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MallasenMBBPP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Medina-RullPPTM22,
author = {Alberto Medina{-}Rull and
Francisco Pasadas and
M. C. Pardo and
Alejandro Toral{-}Lopez and
Enrique G. Marin and
Andres Godoy and
Francisco Javier Garc{\'{\i}}a Ruiz},
title = {Periodic structures based on two-dimensional materials: application
to phase shifters},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--5},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970016},
doi = {10.1109/DCIS55711.2022.9970016},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Medina-RullPPTM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MedranoACE22,
author = {Nicol{\'{a}}s Medrano and
Diego Antol{\'{\i}}n and
Bel{\'{e}}n Calvo and
Daniel En{\'{e}}riz},
title = {10 mA Precision Contactless Current Sensing Using Low-Cost Hall-Effect
Devices},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--5},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970200},
doi = {10.1109/DCIS55711.2022.9970200},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MedranoACE22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MorenoMD22,
author = {Sergio Moreno and
Victor Moro and
{\'{A}}ngel Di{\'{e}}guez},
title = {A 72-bin in-pixel mixed-signal {TDC} for SPAD-based fluorescence lifetime
measurements},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--5},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970121},
doi = {10.1109/DCIS55711.2022.9970121},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MorenoMD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MoroFCPSBWD22,
author = {Victor Moro and
Nil Franch and
Joan Canals and
Joan Daniel Prades and
Georg Sch{\"{o}}ttler and
Steffen Bornemann and
Andreas Waag and
{\'{A}}ngel Di{\'{e}}guez},
title = {High power and high bandwidth {CMOS} driver for hybrid interconnected
GaN microdisplay},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--5},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970019},
doi = {10.1109/DCIS55711.2022.9970019},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MoroFCPSBWD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Nunez-PrietoCAM22,
author = {Ricardo N{\'{u}}{\~{n}}ez{-}Prieto and
David Castells{-}Rufas and
Narc{\'{\i}}s Avellana and
Ricardo Mart{\'{\i}}nez and
Llu{\'{\i}}s Ter{\'{e}}s},
title = {Processor Optimization of an Energy-Efficient {NDIR} {CO2} Wireless
Sensor Node},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970089},
doi = {10.1109/DCIS55711.2022.9970089},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Nunez-PrietoCAM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/OkorieCR22,
author = {Promise I. Okorie and
Luis A. Camu{\~{n}}as{-}Mesa and
Jos{\'{e}} M. de la Rosa},
title = {Using ANNs to Predict Frequency Spectrum Occupancy in Cognitive-Radio
Receivers},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--5},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970197},
doi = {10.1109/DCIS55711.2022.9970197},
timestamp = {Fri, 11 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/OkorieCR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Pacheco-Sanchez22,
author = {Anibal Pacheco{-}Sanchez and
Javier No{\'{e}} Ramos{-}Silva and
Nikolaos Mavredakis and
Eloy Ram{\'{\i}}rez{-}Garc{\'{\i}}a and
David Jim{\'{e}}nez},
title = {Exploiting the ambipolarity in emerging transistors for high-frequency
applications},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970151},
doi = {10.1109/DCIS55711.2022.9970151},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Pacheco-Sanchez22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Paez-MontoroCML22,
author = {Alba P{\'{a}}ez{-}Montoro and
Jose Angel Miranda Calero and
Juan Marcos{-}Torero and
Celia L{\'{o}}pez{-}Ongil},
title = {Towards a Smart Earring for Continuous Heart Rate and Audio Monitoring},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970091},
doi = {10.1109/DCIS55711.2022.9970091},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Paez-MontoroCML22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/PalmaM22,
author = {Kenneth Palma and
Francesc Moll},
title = {Simulated Leakage Power Analysis Attack of the Trivium Stream Cipher},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970061},
doi = {10.1109/DCIS55711.2022.9970061},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/PalmaM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/PenaPAUI22,
author = {Roger Antonio Pe{\~{n}}a and
Mikel Pascual and
Armando Astarloa and
Daniel Uribe and
Jon Inchausti},
title = {Impact of MACsec security on {TSN} traffic},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970155},
doi = {10.1109/DCIS55711.2022.9970155},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/PenaPAUI22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Perez-BailonCM22,
author = {Jorge P{\'{e}}rez{-}Bail{\'{o}}n and
Bel{\'{e}}n Calvo and
Nicol{\'{a}}s Medrano},
title = {Low-Power {CMOS} Amplifiers for Wideband Impedance Spectroscopy Applications},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970024},
doi = {10.1109/DCIS55711.2022.9970024},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Perez-BailonCM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Rojas-MunozSMB22,
author = {Luis F. Rojas{-}Mu{\~{n}}oz and
Santiago S{\'{a}}nchez{-}Solano and
Macarena C. Mart{\'{\i}}nez{-}Rodr{\'{\i}}guez and
Piedad Brox},
title = {True Random Number Generator based on {RO-PUF}},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970032},
doi = {10.1109/DCIS55711.2022.9970032},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Rojas-MunozSMB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SanchezBSEG22,
author = {Antonio J. S{\'{a}}nchez and
Yubal Barrios and
Roberto Sarmiento and
David Hern{\'{a}}ndez Exp{\'{o}}sito and
Antonio S{\'{a}}nchez G{\'{o}}mez},
title = {A lossless compression solution for {SCIP} and TuMag instruments aboard
of {SUNRISE} {III} balloon-borne Solar Observatory},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970132},
doi = {10.1109/DCIS55711.2022.9970132},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/SanchezBSEG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SantiagoMJSL22,
author = {Adri{\'{a}}n Santiago and
Leire Muguira and
Jaime Jim{\'{e}}nez and
Le Sun and
Jes{\'{u}}s L{\'{a}}zaro},
title = {Analysis and Deployment of Applications Acceleration Environment for
Xilinx Hardware-Accelerated Platforms},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970101},
doi = {10.1109/DCIS55711.2022.9970101},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/SantiagoMJSL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SantosFS22,
author = {Carlos Santos and
Jorge R. Fernandes and
Marcelino B. Santos},
title = {Load Optimized Gate Driving for Charge Pumps},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--5},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970011},
doi = {10.1109/DCIS55711.2022.9970011},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/SantosFS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/ScagliusiFPSOG22,
author = {Santiago Fern{\'{a}}ndez Scagliusi and
Daniel Martin Fern{\'{a}}ndez and
Pablo P{\'{e}}rez{-}Garc{\'{\i}}a and
Gloria Huertas S{\'{a}}nchez and
Francisco Javier Medrano{-}Ortega and
Alberto Y{\'{u}}fera Garc{\'{\i}}a},
title = {A low power approach to body position estimation for {HF} patient
monitoring by an ankle positioned Inertial Measurement Unit {(IMU)}},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970113},
doi = {10.1109/DCIS55711.2022.9970113},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/ScagliusiFPSOG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Serrano-Gotarredona22,
author = {Teresa Serrano{-}Gotarredona and
Bernab{\'{e}} Linares{-}Barranco},
title = {System Architectures for Electronically Foveated Dynamic Vision Sensor},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970111},
doi = {10.1109/DCIS55711.2022.9970111},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Serrano-Gotarredona22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Skibinsky-Gitlin22,
author = {Erik S. Skibinsky{-}Gitlin and
Joan Font{-}Rossell{\'{o}} and
Christiam F. Frasser and
Alejandro Mor{\'{a}}n and
Vicens Canals and
Miquel Roca and
Josep L. Rossell{\'{o}}},
title = {Improving efficiency of a Stochastic Computing-based Morphological
Neural Network},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970034},
doi = {10.1109/DCIS55711.2022.9970034},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Skibinsky-Gitlin22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SparrowBJG22,
author = {O. Ramos Sparrow and
Sylvain Bourdel and
Gilles Jacquemod and
Jean Gaubert},
title = {A 6.3 pJ/b Ultra-low Power Energy Detector for Non-Coherent {UWB}
Impulse Radio Receiver},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970057},
doi = {10.1109/DCIS55711.2022.9970057},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/SparrowBJG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SutradharSVMVRT22,
author = {Pallab Sutradhar and
Jaime Sancho and
Manuel Villa and
Alberto Mart{\'{\i}}n{-}P{\'{e}}rez and
Guillermo V{\'{a}}zquez and
Gonzalo Rosa and
Alejandro Martinez de Ternero and
Luis Jimenez{-}Roldan and
Angel Perez{-}Nu{\~{n}}ez and
Alfonso Lagares and
Miguel Chavarr{\'{\i}}as and
Eduardo Ju{\'{a}}rez and
C{\'{e}}sar Sanz},
title = {Exploration of Realtime Brain tumor classification from Hyperspectral
Images in Heterogeneous Embedded MPSoC},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970064},
doi = {10.1109/DCIS55711.2022.9970064},
timestamp = {Thu, 06 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/SutradharSVMVRT22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/TerneroSVVRSMCJ22,
author = {Alejandro Martinez de Ternero and
Jaime Sancho and
Guillermo V{\'{a}}zquez and
Manuel Villa and
Gonzalo Rosa and
Pallab Sutradhar and
Alberto Mart{\'{\i}}n{-}P{\'{e}}rez and
Miguel Chavarr{\'{\i}}as and
Luis Jimenez{-}Roldan and
Angel Perez{-}Nu{\~{n}}ez and
Alfonso Lagares and
Eduardo Ju{\'{a}}rez and
C{\'{e}}sar Sanz},
title = {Analysis and methodology for enabling {DNN} inference in an IoT edge
environment in depth completion tasks},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970054},
doi = {10.1109/DCIS55711.2022.9970054},
timestamp = {Thu, 06 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/TerneroSVVRSMCJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/UnibasoALJM22,
author = {Jos{\'{e}} Luis Unibaso and
Jos{\'{e}} {\'{A}}ngel Araujo and
Jes{\'{u}}s L{\'{a}}zaro and
Jaime Jim{\'{e}}nez and
Leire Muguira},
title = {Design and development of an IoT device provided with a voice interface
to improve treatment adherence in polymedicated patients},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970156},
doi = {10.1109/DCIS55711.2022.9970156},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/UnibasoALJM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/UrainATRB22,
author = {Alvaro Urain and
Javier Ar{\'{\i}}n and
Rolando Torres and
David del Rio and
Roc Berenguer},
title = {Temperature Compensated D-Band SiGe {LNA} with Supply Current Monitoring
for Self-Healing Radiometers},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970141},
doi = {10.1109/DCIS55711.2022.9970141},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/UrainATRB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/VadivelGBCD22,
author = {Kanishkan Vadivel and
Fernando Garc{\'{\i}}a{-}Redondo and
Ali BanaGozar and
Henk Corporaal and
Shidhartha Das},
title = {{SACA:} System-level Analog {CIM} Accelerators Simulation Framework:
Architecture and Cycle-accurate System-to-device Simulator},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970090},
doi = {10.1109/DCIS55711.2022.9970090},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/VadivelGBCD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/VaqueroJR22,
author = {Germ{\'{a}}n Vaquero and
Francisco Jim{\'{e}}nez{-}Molinos and
Juan Bautista Rold{\'{a}}n},
title = {Hardware implementation of self-organizing maps using memristors,
a simulation study},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970139},
doi = {10.1109/DCIS55711.2022.9970139},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/VaqueroJR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/VazquezROT22,
author = {Daniel V{\'{a}}zquez and
Alfonso Rodr{\'{\i}}guez and
Andr{\'{e}}s Otero and
Eduardo de la Torre},
title = {Extending {RISC-V} Processor Datapaths with Multi-Grain Reconfigurable
Overlays},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970069},
doi = {10.1109/DCIS55711.2022.9970069},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/VazquezROT22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/VelarteOPGV22,
author = {Antonio Velarte and
Ar{\'{a}}nzazu Ot{\'{\i}}n and
Esther Pueyo and
Anton Guimer{\`{a}} and
Rosa Villa},
title = {Improving Signal Stability in a Multi-Electrode Array {(MEA)} System
for Cardiac Biopsies},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970060},
doi = {10.1109/DCIS55711.2022.9970060},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/VelarteOPGV22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/dcis/2022,
title = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022},
doi = {10.1109/DCIS55711.2022},
isbn = {978-1-6654-5950-1},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/2022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AlbiolMARG21,
author = {P. Albiol and
Salvador Manich and
Daniel Arum{\'{\i}} and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
{\'{A}}lvaro G{\'{o}}mez{-}Pau},
title = {Low Cost {AES} Protection Against {DPA} Using Rolling Codes},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666192},
doi = {10.1109/DCIS53048.2021.9666192},
timestamp = {Fri, 13 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AlbiolMARG21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AlonsoLJMB21,
author = {Sara Alonso and
Jes{\'{u}}s L{\'{a}}zaro and
Jaime Jimenez and
Leire Muguira and
Unai Bidarte},
title = {Evaluating the OpenAMP framework in real-time embedded SoC platforms},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666157},
doi = {10.1109/DCIS53048.2021.9666157},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AlonsoLJMB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/ArnaizMAV21,
author = {David Arnaiz and
Francesc Moll and
Eduard Alarc{\'{o}}n and
Xavier Vilajosana},
title = {Data Relevance-Aware Dynamic Sensing Technique with Battery Lifetime
Guarantee for Wireless Sensor Nodes},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666191},
doi = {10.1109/DCIS53048.2021.9666191},
timestamp = {Wed, 19 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/ArnaizMAV21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/BailleulCGNKSLB21,
author = {Alexia Bailleul and
Julien Claudel and
Florence Poulletier De Gannes and
Gilles N'Kaoua and
Florian K{\"{o}}lbl and
Fabien Soulier and
No{\"{e}}lle Lewis and
Serge Bernard and
Sylvie Renaud},
title = {In vitro impedance spectroscopy: {A} MEA-based measurement bench for
myoblasts cultures monitoring},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666172},
doi = {10.1109/DCIS53048.2021.9666172},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/BailleulCGNKSLB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/ChabanePCD21,
author = {Lylia Thiziri Chabane and
Dang{-}Ki{\`{e}}n Germain Pham and
Paul Chollet and
Patricia Desgreys},
title = {Design Method of Analog Sigmoid Function and its Approximate Derivative},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666181},
doi = {10.1109/DCIS53048.2021.9666181},
timestamp = {Wed, 19 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/ChabanePCD21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/ChaillouMGA21,
author = {Gwenael Chaillou and
Philippe Maurine and
Jean{-}Marc Galli{\`{e}}re and
Nadine Az{\'{e}}mard},
title = {Iterative Method for Performance Prediction Improvement of Integrated
Circuits},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666182},
doi = {10.1109/DCIS53048.2021.9666182},
timestamp = {Fri, 19 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/ChaillouMGA21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/ColmiaisBAM21,
author = {Ivo Colmiais and
J{\'{e}}r{\^{o}}me Borme and
Pedro Alpuim and
Paulo Mateus Mendes},
title = {Graphene {LC} oscillator for biosensing applications},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666173},
doi = {10.1109/DCIS53048.2021.9666173},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/ColmiaisBAM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/CorreiaTBG21,
author = {Ana Correia and
V{\'{\i}}tor Grade Tavares and
Pedro Barquinha and
Jo{\~{a}}o Goes},
title = {Trade-offs and Limitations in Energy-Efficient Inverter-based {CMOS}
Amplifiers},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666176},
doi = {10.1109/DCIS53048.2021.9666176},
timestamp = {Wed, 09 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/CorreiaTBG21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/EncinasROT21,
author = {Juan Encinas and
Alfonso Rodr{\'{\i}}guez and
Andr{\'{e}}s Otero and
Eduardo de la Torre},
title = {Run-Time Monitoring and ML-Based Modeling in Reconfigurable Multi-Accelerator
Systems},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--7},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666187},
doi = {10.1109/DCIS53048.2021.9666187},
timestamp = {Wed, 19 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/EncinasROT21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/EstebanMAS21,
author = {Raquel De Esteban and
Fernando Manteca and
Marcos Martinez de Alejandro and
Pablo S{\'{a}}nchez},
title = {Runtime reconfigurable system for decommissioned satellite identification
and capture},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666156},
doi = {10.1109/DCIS53048.2021.9666156},
timestamp = {Wed, 19 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/EstebanMAS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/FabeloLOBCCW21,
author = {Himar Fabelo and
Raquel Le{\'{o}}n and
Samuel Ortega and
Francisco Balea{-}Fern{\'{a}}ndez and
Bernardino Clavo and
Gustavo Marrero Callic{\'{o}} and
Ana Wagner},
title = {Evaluating the use of Hyperspectral Imaging as Complementary Blood
Sample Tests},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666164},
doi = {10.1109/DCIS53048.2021.9666164},
timestamp = {Mon, 09 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/FabeloLOBCCW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/FrasserLMFCRSR21,
author = {Christiam F. Frasser and
Pablo Linares{-}Serrano and
Alejandro Mor{\'{a}}n and
Joan Font{-}Rossell{\'{o}} and
Vicent Canals and
Miquel Roca and
Teresa Serrano{-}Gotarredona and
Josep L. Rossell{\'{o}}},
title = {Exploiting Correlation in Stochastic Computing based Deep Neural Networks},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666159},
doi = {10.1109/DCIS53048.2021.9666159},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/FrasserLMFCRSR21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/GardeLABR21,
author = {M. Pilar Garde and
Antonio Lopez{-}Martin and
Jose M. Algueta{-}Miguel and
Javier Beloso{-}Legarra and
Jaime Ram{\'{\i}}rez{-}Angulo},
title = {Energy-Efficient Symmetrical Cascode {OTA} in a 130 nm {CMOS} Process},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666170},
doi = {10.1109/DCIS53048.2021.9666170},
timestamp = {Wed, 19 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/GardeLABR21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/LeonFOC21,
author = {Raquel Le{\'{o}}n and
Himar Fabelo and
Samuel Ortega and
Gustavo Marrero Callic{\'{o}}},
title = {Hyperspectral {VNIR} and {NIR} Sensors for the Analysis of Human Normal
Brain and Tumor Tissue},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666168},
doi = {10.1109/DCIS53048.2021.9666168},
timestamp = {Mon, 09 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/LeonFOC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Martinez-Rodriguez21,
author = {Macarena C. Mart{\'{\i}}nez{-}Rodr{\'{\i}}guez and
Eros Camacho{-}Ruiz and
Santiago S{\'{a}}nchez{-}Solano and
Piedad Brox},
title = {Design Flow to Evaluate the Performance of Ring Oscillator PUFs on
FPGAs},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666190},
doi = {10.1109/DCIS53048.2021.9666190},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Martinez-Rodriguez21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MerinoGPV21,
author = {Javier Merino and
Raul Gomez and
Hector Posadas and
Eugenio Villar},
title = {Multilevel host-compiled simulation framework for ROS-based {UAV}
services using ArduCopter},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666177},
doi = {10.1109/DCIS53048.2021.9666177},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/MerinoGPV21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MoranCAFSFIRR21,
author = {Alejandro Mor{\'{a}}n and
Vincent Canals and
Plamen P. Angelov and
Christiam F. Frasser and
Erik S. Skibinsky{-}Gitlin and
Joan Font and
Eugeni Isern and
Miquel Roca and
Josep L. Rossell{\'{o}}},
title = {Stochastic Computing co-processing elements for Evolving Autonomous
Data Partitioning},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666167},
doi = {10.1109/DCIS53048.2021.9666167},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MoranCAFSFIRR21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/NerisGLS21,
author = {Rom{\'{e}}n Neris and
Ra{\'{u}}l Guerra and
Sebasti{\'{a}}n L{\'{o}}pez and
Roberto Sarmiento},
title = {Performance evaluation of state-of-the-art {CNN} architectures for
the on-board processing of remotely sensed images},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666179},
doi = {10.1109/DCIS53048.2021.9666179},
timestamp = {Wed, 19 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/NerisGLS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/NordiBGALNJCFC21,
author = {Tiago Mateus Nordi and
V. M. Barbosa and
R. H. Gounella and
Godfred Asan and
Maximiliam Luppe and
Jo{\~{a}}o Navarro and
Soares Junior and
Joao Paulo Carmo and
Erich Talamoni Fonoff and
Eduardo Colombari},
title = {Charge-Pump Circuit in 65nm {CMOS} for Neural Stimulation on Deep-Brain
Stimulation},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--4},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666166},
doi = {10.1109/DCIS53048.2021.9666166},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/NordiBGALNJCFC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/OyarzunCPG21,
author = {Luis Oyarz{\'{u}}n and
Encarnaci{\'{o}}n Castillo and
Luis Parrilla and
Antonio Garc{\'{\i}}a},
title = {Window Polarization in PCA-based Analysis of Non-Invasive Fetal {ECG}
recordings},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666154},
doi = {10.1109/DCIS53048.2021.9666154},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/OyarzunCPG21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/PachecoL21,
author = {Javier De Mena Pacheco and
Marisa L{\'{o}}pez{-}Vallejo},
title = {A 65nm Current and Voltage Reference with Improved Line Regulation
for Implantable Biosensors},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666160},
doi = {10.1109/DCIS53048.2021.9666160},
timestamp = {Wed, 19 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/PachecoL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/PuertasGPSPOHMY21,
author = {Martin Puertas and
Luis Gim{\'{e}}nez{-}Miranda and
Ana P{\'{e}}rez and
Santiago Fern{\'{a}}ndez Scagliusi and
Pablo P{\'{e}}rez{-}Garc{\'{\i}}a and
Alberto Olmo and
Gloria Huertas and
Francisco Javier Medrano{-}Ortega and
Alberto Y{\'{u}}fera},
title = {Modeling Edema Evolution With Electrical Bioimpedance: Application
to Heart Failure Patients},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666158},
doi = {10.1109/DCIS53048.2021.9666158},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/PuertasGPSPOHMY21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/QuintanaOLFCLLB21,
author = {Laura Quintana and
Samuel Ortega and
Raquel Le{\'{o}}n and
Himar Fabelo and
Gustavo Marrero Callic{\'{o}} and
Carlos L{\'{o}}pez and
Maryl{\`{e}}ne Lejeune and
Ram{\'{o}}n Bosch},
title = {Instrumentation Evaluation for Hyperspectral Microscopy Targeting
Enhanced Medical Histology},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666188},
doi = {10.1109/DCIS53048.2021.9666188},
timestamp = {Mon, 09 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/QuintanaOLFCLLB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/RizziQWZB21,
author = {Tommaso Rizzi and
Emilio P{\'{e}}rez{-}Bosch Quesada and
Christian Wenger and
Cristian Zambelli and
Davide Bertozzi},
title = {Comparative Analysis and Optimization of the SystemC-AMS Analog Simulation
Efficiency of Resistive Crossbar Arrays},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666193},
doi = {10.1109/DCIS53048.2021.9666193},
timestamp = {Thu, 28 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/RizziQWZB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Rubio-IbanezMD21,
author = {Pablo Rubio{-}Ib{\'{a}}{\~{n}}ez and
J. Javier Mart{\'{\i}}nez{-}{\'{A}}lvarez and
Gin{\'{e}}s Dom{\'{e}}nech{-}Asensi},
title = {A library-based tool to translate high level {DNN} models into hierarchical
{VHDL} descriptions},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666161},
doi = {10.1109/DCIS53048.2021.9666161},
timestamp = {Wed, 19 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Rubio-IbanezMD21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SanchoVUVSRMVCS21,
author = {Jaime Sancho and
Manuel Villa and
Gemma Urbanos and
Marta Villanueva and
Pallab Sutradhar and
Gonzalo Rosa and
Alberto Mart{\'{\i}}n and
Guillermo V{\'{a}}zquez and
Miguel Chavarr{\'{\i}}as and
Rub{\'{e}}n Salvador and
Alfonso Lagares and
Eduardo Ju{\'{a}}rez and
C{\'{e}}sar Sanz},
title = {An Embedded {GPU} Accelerated Hyperspectral Video Classification System
in Real-Time},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666171},
doi = {10.1109/DCIS53048.2021.9666171},
timestamp = {Thu, 06 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/SanchoVUVSRMVCS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SaraivaDT21,
author = {Bruno Saraiva and
C{\^{a}}ndido Duarte and
V{\'{\i}}tor Grade Tavares},
title = {A Switching-Mode Power Recycling System for a Radio-Frequency Outphasing
Transmitter},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666180},
doi = {10.1109/DCIS53048.2021.9666180},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/SaraivaDT21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SemiaoSS21,
author = {Jorge Semi{\~{a}}o and
Lu{\'{\i}}s Santos and
Marcelino B. Santos},
title = {{SRAM} Performance Sensor},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666163},
doi = {10.1109/DCIS53048.2021.9666163},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/SemiaoSS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/UrainRGSBB21,
author = {Alvaro Urain and
David del Rio and
I{\~{n}}aki Gurutzeaza and
H{\'{e}}ctor Solar and
Andoni Beriain and
Roc Berenguer},
title = {Design and Layout Considerations of a D-Band SiGe {LNA} for Radiometric
Applications},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666165},
doi = {10.1109/DCIS53048.2021.9666165},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/UrainRGSBB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/VenturaBSS21,
author = {Diego Ventura and
Yubal Barrios and
Antonio J. S{\'{a}}nchez and
Roberto Sarmiento},
title = {{EDAC} implementation on a data lossless compressor compliant with
the {CCSDS} 121.0-B-3 standard},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666189},
doi = {10.1109/DCIS53048.2021.9666189},
timestamp = {Mon, 09 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/VenturaBSS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/VillaSVUSRVMCPP21,
author = {Manuel Villa and
Jaime Sancho and
Marta Villanueva and
Gemma Urbanos and
Pallab Sutradhar and
Gonzalo Rosa and
Guillermo V{\'{a}}zquez and
Alberto Mart{\'{\i}}n and
Miguel Chavarr{\'{\i}}as and
Luis Perez and
Angel Perez{-}Nu{\~{n}}ez and
Alfonso Lagares and
Eduardo Ju{\'{a}}rez and
C{\'{e}}sar Sanz},
title = {Stitching technique based on {SURF} for Hyperspectral Pushbroom Linescan
Cameras},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666155},
doi = {10.1109/DCIS53048.2021.9666155},
timestamp = {Thu, 06 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/VillaSVUSRVMCPP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/XavierBG21,
author = {Jo{\~{a}}o Xavier and
Pedro Barquinha and
Jo{\~{a}}o Goes},
title = {Design of a Ring-Amplifier Robust Against {PVT} Variations in Deep-Nanoscale
FinFET {CMOS}},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666185},
doi = {10.1109/DCIS53048.2021.9666185},
timestamp = {Fri, 24 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/XavierBG21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/YangAMGRRGCF21,
author = {Binbin Yang and
Daniel Arum{\'{\i}} and
Salvador Manich and
{\'{A}}lvaro G{\'{o}}mez{-}Pau and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Juan Bautista Rold{\'{a}}n and
Mireia Bargallo Gonz{\'{a}}lez and
Francesca Campabadal and
Liang Fang},
title = {Simulation of serial {RRAM} cell based on a Verilog-A compact model},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666174},
doi = {10.1109/DCIS53048.2021.9666174},
timestamp = {Fri, 21 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/YangAMGRRGCF21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/dcis/2021,
title = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021},
doi = {10.1109/DCIS53048.2021},
isbn = {978-1-6654-2116-4},
timestamp = {Wed, 19 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/2021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/0001BMAJ20,
author = {Jes{\'{u}}s L{\'{a}}zaro and
Laura Burgos and
Leire Muguira and
Armando Astarloa and
Jaime Jim{\'{e}}nez},
title = {Electronic control board for student Rocket},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268644},
doi = {10.1109/DCIS51330.2020.9268644},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/0001BMAJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/0001C020,
author = {Luis Parrilla and
Encarnaci{\'{o}}n Castillo and
Antonio Garc{\'{\i}}a},
title = {Privacy-enabled system based on Elliptic Curve Cryptography to reduce
risks of contagion in pandemics},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268632},
doi = {10.1109/DCIS51330.2020.9268632},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/0001C020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AbellaBCCCDFGHH20,
author = {Jaume Abella and
Calvin Bulla and
Guillem Cabo and
Francisco J. Cazorla and
Adri{\'{a}}n Cristal and
Max Doblas and
Roger Figueras and
Alberto Gonz{\'{a}}lez and
Carles Hern{\'{a}}ndez and
C{\'{e}}sar Hern{\'{a}}ndez and
V{\'{\i}}ctor Jim{\'{e}}nez and
Leonidas Kosmidis and
Vatistas Kostalabros and
Rub{\'{e}}n Langarita and
Neiel Leyva and
Guillem L{\'{o}}pez{-}Parad{\'{\i}}s and
Joan Marimon and
Ricardo Mart{\'{\i}}nez and
Jonnatan Mendoza and
Francesc Moll and
Miquel Moret{\'{o}} and
Juli{\'{a}}n Pav{\'{o}}n and
Crist{\'{o}}bal Ram{\'{\i}}rez and
Marco Antonio Ram{\'{\i}}rez and
Carlos Rojas Morales and
Antonio Rubio and
Abraham Ruiz and
Nehir S{\"{o}}nmez and
V{\'{\i}}ctor Soria and
Llu{\'{\i}}s Ter{\'{e}}s and
Osman S. Unsal and
Mateo Valero and
Iv{\'{a}}n Vargas Valdivieso and
Luis Villa},
title = {An Academic {RISC-V} Silicon Implementation Based on Open-Source Components},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268664},
doi = {10.1109/DCIS51330.2020.9268664},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AbellaBCCCDFGHH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AguilarACCRPCMM20,
author = {Javier Aguilar and
Albert {\'{A}}lvarez{-}Carulla and
Valeria Colmena and
Oscar Carreras and
Genis Rabost and
Manel Puig{-}Vidal and
Jordi Colomer{-}Farrarons and
Xavier Mu{\~{n}}oz and
Pere Llu{\'{\i}}s Miribel{-}Catal{\`{a}} and
Jaime Punter{-}Villagrasa},
title = {Autonomous self-powered potentiostat architecture for biomedical wearable
applications},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268667},
doi = {10.1109/DCIS51330.2020.9268667},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AguilarACCRPCMM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Ahmadi-FarsaniL20,
author = {Javad Ahmadi{-}Farsani and
Bernab{\'{e}} Linares{-}Barranco and
Teresa Serrano{-}Gotarredona},
title = {A Current-Attenuator for Performing Read Operation in Memristor-Based
Spiking Neural Networks},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--4},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268655},
doi = {10.1109/DCIS51330.2020.9268655},
timestamp = {Tue, 08 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Ahmadi-FarsaniL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AlheyasatTBA20,
author = {Abdel Alheyasat and
Gabriel Torrens and
Sebasti{\`{a}} A. Bota and
Bartomeu Alorda},
title = {Selection of {SRAM} Cells to improve Reliable {PUF} implementation
using Cell Mismatch Metric},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268669},
doi = {10.1109/DCIS51330.2020.9268669},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/AlheyasatTBA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Alonso0JML20,
author = {Sara Alonso and
Jes{\'{u}}s L{\'{a}}zaro and
Jaime Jim{\'{e}}nez and
Leire Muguira and
Alejandro Largacha},
title = {Analysing the interference of Xen hypervisor in the network speed},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268648},
doi = {10.1109/DCIS51330.2020.9268648},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Alonso0JML20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Alvero-Gonzalez20,
author = {Leidy Mabel Alvero{-}Gonzalez and
Luis Hernandez Corporales and
Eric Gutierrez},
title = {High-Speed and Energy-Efficient Ring-Oscillator for Analog-to-Digital
Conversion},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268623},
doi = {10.1109/DCIS51330.2020.9268623},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Alvero-Gonzalez20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AstarloaRDJ020,
author = {Armando Astarloa and
Mikel Rodriguez and
Francisco Dur{\'{a}}n and
Jaime Jim{\'{e}}nez and
Jes{\'{u}}s L{\'{a}}zaro},
title = {Synchronizing {NTP} Referenced {SCADA} Systems Interconnected by High-availability
Networks},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268620},
doi = {10.1109/DCIS51330.2020.9268620},
timestamp = {Mon, 28 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AstarloaRDJ020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AsuncionLG20,
author = {Samuel L{\'{o}}pez Asunci{\'{o}}n and
Marisa L{\'{o}}pez{-}Vallejo and
Jes{\'{u}}s Grajal},
title = {Algorithm-Architecture Optimization for Linear and Quadratic Regression
on Reconfigurable Platforms},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268633},
doi = {10.1109/DCIS51330.2020.9268633},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AsuncionLG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/BahramaliLL20,
author = {Asghar Bahramali and
Marisa L{\'{o}}pez{-}Vallejo and
Carlos A. L{\'{o}}pez{-}Barrio},
title = {An ultra-low power deep sub-micron fast start-up circuit with added
line regulation},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268622},
doi = {10.1109/DCIS51330.2020.9268622},
timestamp = {Tue, 08 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/BahramaliLL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/BandicZAA20,
author = {Medina Bandic and
Hossein Zarein and
Eduard Alarc{\'{o}}n and
Carmen G. Almud{\'{e}}ver},
title = {On Structured Design Space Exploration for Mapping of Quantum Algorithms},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268670},
doi = {10.1109/DCIS51330.2020.9268670},
timestamp = {Tue, 08 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/BandicZAA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/BarenysVL20,
author = {Arnau Salas Barenys and
Neus Vidal and
Jos{\'{e}} Mar{\'{\i}}a L{\'{o}}pez{-}Villegas},
title = {Compact 3D-Printed Folded Branch-Line Hybrid Coupler based on Helical-Microstrip
Transmission Lines},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268661},
doi = {10.1109/DCIS51330.2020.9268661},
timestamp = {Mon, 31 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/BarenysVL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Barriga20,
author = {Angel Barriga},
title = {{RISC-V} processors design: a methodology for cores development},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268639},
doi = {10.1109/DCIS51330.2020.9268639},
timestamp = {Tue, 08 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Barriga20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/BriongosMM020,
author = {Samira Briongos and
Pedro Malag{\'{o}}n and
Jos{\'{e}} Manuel Moya and
Thomas Eisenbarth},
title = {Microarchitectural Isolation Guarantees Through Execution Based Signatures},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268660},
doi = {10.1109/DCIS51330.2020.9268660},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/BriongosMM020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Camacho-RuizMSB20,
author = {Eros Camacho{-}Ruiz and
Macarena C. Mart{\'{\i}}nez{-}Rodr{\'{\i}}guez and
Santiago S{\'{a}}nchez{-}Solano and
Piedad Brox},
title = {Accelerating the Development of {NTRU} Algorithm on Embedded Systems},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268647},
doi = {10.1109/DCIS51330.2020.9268647},
timestamp = {Thu, 23 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Camacho-RuizMSB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/CanabalMLGL20,
author = {Manuel Felipe Canabal and
Jose Angel Miranda and
Jos{\'{e}} Manuel Lanza{-}Guti{\'{e}}rrez and
A. I. P{\'{e}}rez Garcil{\'{o}}pez and
Celia L{\'{o}}pez{-}Ongil},
title = {Electrodermal Activity Smart Sensor Integration in a Wearable Affective
Computing System},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268662},
doi = {10.1109/DCIS51330.2020.9268662},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/CanabalMLGL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/CarvalhoFT20,
author = {Guilherme Carvalho and
Jo{\~{a}}o Canas Ferreira and
V{\'{\i}}tor Grade Tavares},
title = {Hardware architecture for integrate-and-fire signal reconstruction
on {FPGA}},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268638},
doi = {10.1109/DCIS51330.2020.9268638},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/CarvalhoFT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/EstebanMR20,
author = {Luis Esteban and
Juan Antonio L{\'{o}}pez Mart{\'{\i}}n and
Alberto Regad{\'{\i}}o},
title = {Round-off noise estimation of fixed-point algorithms using Modified
Affine Arithmetic and Legendre Polynomials},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268668},
doi = {10.1109/DCIS51330.2020.9268668},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/EstebanMR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/FabeloLOBBCW20,
author = {Himar Fabelo and
Raquel Le{\'{o}}n and
Samuel Ortega and
Francisco Balea{-}Fern{\'{a}}ndez and
Cristina Bilbao and
Gustavo Marrero Callic{\'{o}} and
Ana Wagner},
title = {Novel Methodology for Alzheimer's Disease Biomarker Identification
in Plasma using Hyperspectral Microscopy},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268654},
doi = {10.1109/DCIS51330.2020.9268654},
timestamp = {Mon, 09 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/FabeloLOBBCW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Garcia-Astudillo20,
author = {Luis {\'{A}}ngel Garc{\'{\i}}a{-}Astudillo and
Almudena Lindoso and
Marta Portela and
Luis Entrena},
title = {Evaluation of a Reduced Precision Redundancy {FFT} Design},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268634},
doi = {10.1109/DCIS51330.2020.9268634},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Garcia-Astudillo20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Garrido20,
author = {Mario Garrido},
title = {Evolution of the Performance of Pipelined {FFT} Architectures Through
the Years},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268642},
doi = {10.1109/DCIS51330.2020.9268642},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Garrido20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Gonzalez-Cordero20,
author = {Gerardo Gonz{\'{a}}lez{-}Cordero and
M. B. Gonz{\'{a}}lez and
Francesca Campabadal and
Francisco Jim{\'{e}}nez{-}Molinos and
Juan Bautista Rold{\'{a}}n},
title = {A physically based {SPICE} model for RRAMs including {RTN}},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268665},
doi = {10.1109/DCIS51330.2020.9268665},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Gonzalez-Cordero20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/HernandezNFU20,
author = {{\'{A}}lvaro Hern{\'{a}}ndez and
Rub{\'{e}}n Nieto and
David Fuentes and
Jes{\'{u}}s Ure{\~{n}}a},
title = {Design of a SoC Architecture for the Edge Computing of {NILM} Techniques},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268626},
doi = {10.1109/DCIS51330.2020.9268626},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/HernandezNFU20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/KovacsTEBP20,
author = {Ingrid Kovacs and
Marina Dana Topa and
Monica Ene and
Andi Buzo and
Georg Pelz},
title = {A metamodel-based adaptive sampling approach for efficient failure
region characterization of integrated circuits},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268659},
doi = {10.1109/DCIS51330.2020.9268659},
timestamp = {Mon, 07 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/KovacsTEBP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/LeonMFOCBS20,
author = {Raquel Le{\'{o}}n and
Beatriz Mart{\'{\i}}nez{-}Vega and
Himar Fabelo and
Samuel Ortega and
Gustavo Marrero Callic{\'{o}} and
Francisco Balea{-}Fern{\'{a}}ndez and
Cristina Bilbao Sieyro},
title = {Hyperspectral Imaging for Major Neurocognitive Disorder Detection
in Plasma Samples},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268625},
doi = {10.1109/DCIS51330.2020.9268625},
timestamp = {Mon, 09 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/LeonMFOCBS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Lopez-GassoBSB20,
author = {Alberto Lopez{-}Gasso and
Andoni Beriain and
H{\'{e}}ctor Solar and
Roc Berenguer},
title = {Switched Capacitors Charge Pump with half-floating Topology for a
high-efficient Solar Energy Harvester},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268631},
doi = {10.1109/DCIS51330.2020.9268631},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Lopez-GassoBSB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Martinez-Gonzalez20,
author = {Alicia Mart{\'{\i}}nez{-}Gonz{\'{a}}lez and
Ana Del Valle and
Himar Fabelo and
Samuel Ortega and
Gustavo Marrero Callic{\'{o}}},
title = {Can Hyperspectral Images be used to detect Brain tumor pixels and
their malignant phenotypes?},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268641},
doi = {10.1109/DCIS51330.2020.9268641},
timestamp = {Tue, 08 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Martinez-Gonzalez20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Martinez-VegaQL20,
author = {Beatriz Mart{\'{\i}}nez{-}Vega and
Eduardo Quevedo and
Raquel Le{\'{o}}n and
Himar Fabelo and
Samuel Ortega and
Gustavo Marrero Callic{\'{o}} and
Irene Casta{\~{n}}o and
Gregorio Carretero and
Pablo Almeida and
Aday Garc{\'{\i}}a and
Javier A. Hern{\'{a}}ndez and
Stig Uteng and
Fred Godtliebsen},
title = {Statistics-based Classification Approach for Hyperspectral Dermatologic
Data Processing},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268646},
doi = {10.1109/DCIS51330.2020.9268646},
timestamp = {Mon, 09 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Martinez-VegaQL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MessaoudiCA20,
author = {Nizar Messaoudi and
Clayton Crocker and
Marc Almendros},
title = {A Hardware-Accelerated Qubit Control System for Quantum Information
Processing},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268643},
doi = {10.1109/DCIS51330.2020.9268643},
timestamp = {Tue, 08 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MessaoudiCA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MirandaCGLL20,
author = {Jose Angel Miranda and
Manuel Felipe Canabal and
Laura Guti{\'{e}}rrez{-}Mart{\'{\i}}n and
Jos{\'{e}} Manuel Lanza{-}Guti{\'{e}}rrez and
Celia L{\'{o}}pez{-}Ongil},
title = {A Design Space Exploration for Heart Rate Variability in a Wearable
Smart Device},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268628},
doi = {10.1109/DCIS51330.2020.9268628},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/MirandaCGLL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MolinosSBB20,
author = {Diego Golpe Molinos and
H{\'{e}}ctor Solar and
Andoni Beriain and
Roc Berenguer},
title = {Voltage Multiplier Topologies Comparison for {UHF} {RFID} Applications},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268624},
doi = {10.1109/DCIS51330.2020.9268624},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MolinosSBB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MontonS20,
author = {Marius Monton and
Xavier Salazar},
title = {On licenses for [Open] Hardware},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268619},
doi = {10.1109/DCIS51330.2020.9268619},
timestamp = {Wed, 09 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MontonS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MoranCRIR20,
author = {Alejandro Mor{\'{a}}n and
Vincent Canals and
Miquel Roca and
Eugeni Isern and
Josep L. Rossell{\'{o}}},
title = {{FPGA} Implementation of Random Vector Functional Link Networks based
on Elementary Cellular Automata},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268673},
doi = {10.1109/DCIS51330.2020.9268673},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MoranCRIR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MorillasI20,
author = {Rafael Medina Morillas and
Pablo Ituero},
title = {{STDP} Design Trade-offs for FPGA-Based Spiking Neural Networks},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268614},
doi = {10.1109/DCIS51330.2020.9268614},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MorillasI20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Muguira0AAR20,
author = {Leire Muguira and
Jes{\'{u}}s L{\'{a}}zaro and
Sara Alonso and
Armando Astarloa and
Mikel Rodriguez},
title = {Secure Critical Traffic of the Electric Sector over Time-Sensitive
Networking},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268613},
doi = {10.1109/DCIS51330.2020.9268613},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Muguira0AAR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/NaderiSMHY20,
author = {Kebria Naderi and
Erwin H. T. Shad and
Marta Molinas and
Ali Heidari and
Trond Ytterdal},
title = {A Very Low {SEF} Neural Amplifier by Utilizing a High Swing Current-Reuse
Amplifier},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--4},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268627},
doi = {10.1109/DCIS51330.2020.9268627},
timestamp = {Tue, 08 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/NaderiSMHY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/NietoDMH20,
author = {Rub{\'{e}}n Nieto and
Edel D{\'{\i}}az and
Ra{\'{u}}l Mateos and
{\'{A}}lvaro Hern{\'{a}}ndez},
title = {Evaluation of Software Inter-Processor Synchronization Methods for
the Zynq-UltraScale+ Architecture},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268616},
doi = {10.1109/DCIS51330.2020.9268616},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/NietoDMH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Perez-AvilaGPQM20,
author = {Antonio J. P{\'{e}}rez{-}{\'{A}}vila and
Gerardo Gonz{\'{a}}lez{-}Cordero and
Eduardo P{\'{e}}rez and
Emilio P{\'{e}}rez{-}Bosch Quesada and
Mamathamba Kalishettyhalli Mahadevaiaha and
Christian Wenger and
Juan Bautista Rold{\'{a}}n and
Francisco Jim{\'{e}}nez{-}Molinos},
title = {Behavioral modeling of multilevel HfO2-based memristors for neuromorphic
circuit simulation},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268652},
doi = {10.1109/DCIS51330.2020.9268652},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Perez-AvilaGPQM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/PerezYSH20,
author = {Pablo P{\'{e}}rez and
Alberto Y{\'{u}}fera and
Juan Alfonso Serrano and
Gloria Huertas},
title = {Designing bioimpedance based sensors for cell cultures test},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268672},
doi = {10.1109/DCIS51330.2020.9268672},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/PerezYSH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/PlazaCDMG20,
author = {Sergio Lluva Plaza and
Jose M. Villadangos Carrizo and
Juan Jes{\'{u}}s Garc{\'{\i}}a Dom{\'{\i}}nguez and
Ana Jim{\'{e}}nez Mart{\'{\i}}n and
David Gualda G{\'{o}}mez},
title = {FrailWear: {A} Wearable IoT Device for Daily Activity Monitoring of
Elderly Patients},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268629},
doi = {10.1109/DCIS51330.2020.9268629},
timestamp = {Tue, 08 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/PlazaCDMG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/PosadasMV20,
author = {H{\'{e}}ctor Posadas and
Javier Merino and
Eugenio Villar},
title = {Data flow analysis from {UML/MARTE} models based on binary traces},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268671},
doi = {10.1109/DCIS51330.2020.9268671},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/PosadasMV20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Ramirez-Barcenas20,
author = {Alberto Ram{\'{\i}}rez{-}B{\'{a}}rcenas and
Marta Portela{-}Garc{\'{\i}}a and
Mario Garc{\'{\i}}a{-}Valderas and
Celia L{\'{o}}pez{-}Ongil},
title = {System Dependability in Edge Computing Wearable Devices},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268674},
doi = {10.1109/DCIS51330.2020.9268674},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Ramirez-Barcenas20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/ReviriegoLSXM20,
author = {Pedro Reviriego and
Shanshan Liu and
Alfonso S{\'{a}}nchez{-}Maci{\'{a}}n and
Liyi Xiao and
Juan Antonio Maestro},
title = {Reduction of Parity Overhead in a Subset of Orthogonal Latin Square
Codes},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268637},
doi = {10.1109/DCIS51330.2020.9268637},
timestamp = {Wed, 10 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/ReviriegoLSXM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/RodrigoAAA20,
author = {Santiago Rodrigo and
Sergi Abadal and
Eduard Alarc{\'{o}}n and
Carmen G. Almud{\'{e}}ver},
title = {Will Quantum Computers Scale Without Inter-Chip Comms? {A} Structured
Design Exploration to the Monolithic vs Distributed Architectures
Quest},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268630},
doi = {10.1109/DCIS51330.2020.9268630},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/RodrigoAAA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/RosaVSURVMJJCLS20,
author = {Gonzalo Rosa and
Marta Villanueva and
Jaime Sancho and
Gemma Urbanos and
Luisa Ruiz and
Manuel Villa and
Alberto Mart{\'{\i}}n and
Eduardo Ju{\'{a}}rez and
Luis Jim{\'{e}}nez and
Miguel Chavarr{\'{\i}}as and
Alfonso Lagares and
C{\'{e}}sar Sanz},
title = {Hyperspectral Images Acquisition: an Efficient Capture and Processing
Stitching Procedure for Medical Environments},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268658},
doi = {10.1109/DCIS51330.2020.9268658},
timestamp = {Thu, 06 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/RosaVSURVMJJCLS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/RuizMUVSRVCPJLS20,
author = {Luisa Ruiz and
Alberto Mart{\'{\i}}n and
Gemma Urbanos and
Marta Villanueva and
Jaime Sancho and
Gonzalo Rosa and
Manuel Villa and
Miguel Chavarr{\'{\i}}as and
{\'{A}}ngel P{\'{e}}rez and
Eduardo Ju{\'{a}}rez and
Alfonso Lagares and
C{\'{e}}sar Sanz},
title = {Multiclass Brain Tumor Classification Using Hyperspectral Imaging
and Supervised Machine Learning},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268650},
doi = {10.1109/DCIS51330.2020.9268650},
timestamp = {Thu, 06 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/RuizMUVSRVCPJLS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Saiz-PerezPMKMM20,
author = {Jos{\'{e}} Luis Saiz{-}P{\'{e}}rez and
Javier del Pino and
Daniel Mayor{-}Duarte and
Sunil Lalchand Khemchandani and
Mario San Miguel{-}Montesdeoca and
Sergio Mateos{-}Angulo},
title = {Distributed power amplifier in GaN technology with tapered drain lines},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--4},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268621},
doi = {10.1109/DCIS51330.2020.9268621},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Saiz-PerezPMKMM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SanchoURVRDVCLS20,
author = {Jaime Sancho and
Gemma Urbanos and
Luisa Ruiz and
Marta Villanueva and
Gonzalo Rosa and
Alberto Diaz and
Manuel Villa and
Miguel Chavarr{\'{\i}}as and
Alfonso Lagares and
Rub{\'{e}}n Salvador and
Eduardo Ju{\'{a}}rez and
C{\'{e}}sar Sanz},
title = {Towards {GPU} Accelerated HyperSpectral Depth Estimation in Medical
Applications},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268649},
doi = {10.1109/DCIS51330.2020.9268649},
timestamp = {Thu, 06 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/SanchoURVRDVCLS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SantosAM20,
author = {Rafael Santos and
Jo{\~{a}}o Afonso and
Jos{\'{e}} Monteiro},
title = {Short-circuit Analysis using a Parallel {QBF} Solver},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268636},
doi = {10.1109/DCIS51330.2020.9268636},
timestamp = {Wed, 23 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/SantosAM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/ShamsiALS20,
author = {Jafar Shamsi and
Maria Jos{\'{e}} Avedillo and
Bernab{\'{e}} Linares{-}Barranco and
Teresa Serrano{-}Gotarredona},
title = {Oscillatory Hebbian Rule {(OHR):} An adaption of the Hebbian rule
to Oscillatory Neural Networks},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268618},
doi = {10.1109/DCIS51330.2020.9268618},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/ShamsiALS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SilvaCMMMGM20,
author = {Jos{\'{e}} Machado da Silva and
Ilaria Cerrone and
Daniel Malag{\'{o}}n and
Jorge Marinho and
Stephen Mundy and
Jo{\~{a}}o Gaspar and
Joaquim Gabriel Mendes},
title = {A Smart Dental Prosthesis to Restore Dental Proprioceptivity},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268653},
doi = {10.1109/DCIS51330.2020.9268653},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/SilvaCMMMGM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SuanesDTS20,
author = {Alejandro Suanes and
Michele Dei and
Llu{\'{\i}}s Ter{\'{e}}s and
Francisco Serra{-}Graells},
title = {A 16bit 50kHz 177dB-FOMS Calibration-Free Bootstrapping-Free {SC}
Delta-Sigma Modulator {IP} Block for Low-Power High-Resolution ADCs},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268617},
doi = {10.1109/DCIS51330.2020.9268617},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/SuanesDTS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Torres-SanchezA20,
author = {Enrique Torres{-}S{\'{a}}nchez and
Jes{\'{u}}s Alastruey{-}Bened{\'{e}} and
Enrique F. Torres Moreno},
title = {Developing an {AI} IoT application with open software on a {RISC-V}
SoC},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268645},
doi = {10.1109/DCIS51330.2020.9268645},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Torres-SanchezA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/VeraP20,
author = {Pablo Vera and
Susana Pat{\'{o}}n},
title = {{DAC} mismatch shaping in Discrete Time Sigma Delta ADCs with non
uniform quantizer},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268615},
doi = {10.1109/DCIS51330.2020.9268615},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/VeraP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/VidalSGRGJL20,
author = {Neus Vidal and
Arnau Salas Barenys and
Aleix Garcia and
Jordi Romeu and
Giselle Gonz{\'{a}}lez and
Lluis Jofre and
Jos{\'{e}} Mar{\'{\i}}a L{\'{o}}pez{-}Villegas},
title = {Design and Characterization of Non-planar 3D-printed Passive {UHF-RFID}
Tag},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--4},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268666},
doi = {10.1109/DCIS51330.2020.9268666},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/VidalSGRGJL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/VillanuevaRPF20,
author = {Juan A. L{\'{o}}pez Villanueva and
Salvador Rodr{\'{\i}}guez{-}Bol{\'{\i}}var and
Luis Parrilla and
C{\'{e}}sar Fi{\~{n}}ana},
title = {Simple Single Particle Model for Interpreting Fast Charge Results
in Intercalation Batteries},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268676},
doi = {10.1109/DCIS51330.2020.9268676},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/VillanuevaRPF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/ZarandiRR20,
author = {Arezoo Dabaghi Zarandi and
Antonio Rubio and
Mohammad Reza Reshadinezhad},
title = {A Memristor-based Quaternary Memory with Adaptive Noise Tolerance},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268675},
doi = {10.1109/DCIS51330.2020.9268675},
timestamp = {Thu, 06 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/ZarandiRR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/dcis/2020,
title = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
publisher = {{IEEE}},
year = {2020},
url = {https://ieeexplore.ieee.org/xpl/conhome/9268497/proceeding},
isbn = {978-1-7281-9132-4},
timestamp = {Tue, 08 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/2020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AbaldeaBCETRL19,
author = {Manuel J. Abaldea and
Jes{\'{u}}s Barba and
Juli{\'{a}}n Caba and
Soledad Escolar and
Jos{\'{e}} Antonio de la Torre and
Fernando Rinc{\'{o}}n and
Juan Carlos L{\'{o}}pez},
title = {Aerial-Ground Collaborative Pathfinding with {HLSTL} using FPGAs},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959919},
doi = {10.1109/DCIS201949030.2019.8959919},
timestamp = {Sat, 27 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AbaldeaBCETRL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AlheyasatTBA19,
author = {Abdel Alheyasat and
Gabriel Torrens and
Sebasti{\`{a}} A. Bota and
Bartomeu Alorda},
title = {Weak and Strong {SRAM} cells analysis in embedded memories for {PUF}
applications},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959939},
doi = {10.1109/DCIS201949030.2019.8959939},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/AlheyasatTBA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AlvarezU0S19,
author = {{\'{A}}ngel {\'{A}}lvarez and
{\'{I}}{\~{n}}igo Ugarte and
V{\'{\i}}ctor Fern{\'{a}}ndez and
Pablo S{\'{a}}nchez},
title = {Design Space Exploration in Heterogeneous Platforms Using OpenMP},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959934},
doi = {10.1109/DCIS201949030.2019.8959934},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AlvarezU0S19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Alvero-Gonzalez19,
author = {Leidy Mabel Alvero{-}Gonzalez and
Luis Hern{\'{a}}ndez and
Eric Gutierrez},
title = {Resolution Enhancement of VCO-based ADCs by Passive Interpolation
and Phase Injection},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959933},
doi = {10.1109/DCIS201949030.2019.8959933},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Alvero-Gonzalez19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AragonRLQPMA19,
author = {Jaime Sancho Arag{\'{o}}n and
Sergio S{\'{a}}nchez Ram{\'{\i}}rez and
Raquel Lazcano L{\'{o}}pez and
Daniel Madro{\~{n}}al Quint{\'{\i}}n and
Rub{\'{e}}n Salvador Perea and
Eduardo Ju{\'{a}}rez Mart{\'{\i}}nez and
C{\'{e}}sar Sanz {\'{A}}lvaro},
title = {Characterizing Hyperspectral Data Layouts: Performance and Energy
Efficiency in Embedded GPUs for PCA-based Dimensionality Reduction},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959835},
doi = {10.1109/DCIS201949030.2019.8959835},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AragonRLQPMA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AragonesARAM19,
author = {Xavier Aragon{\`{e}}s and
Alex Alvarez and
Juan Pablo Rovayo and
Josep Altet and
Diego Mateo},
title = {Design of {ULV} {ULP} LNAs Exploiting {FBB} in {FDSOI} 28nm Technology},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959894},
doi = {10.1109/DCIS201949030.2019.8959894},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AragonesARAM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Avalos-LegazI19,
author = {Sergio {\'{A}}valos{-}Legaz and
Pablo Ituero},
title = {Time-Domain Coding for Resource-Efficient Deep Neural Networks},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959836},
doi = {10.1109/DCIS201949030.2019.8959836},
timestamp = {Thu, 06 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Avalos-LegazI19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/BahramaliLL19,
author = {Asghar Bahramali and
Marisa L{\'{o}}pez{-}Vallejo and
Carlos A. L{\'{o}}pez{-}Barrio},
title = {A 365mV, 13nW CMOS-only energy harvested reference voltage for {RFID}
applications in 40nm technology},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959909},
doi = {10.1109/DCIS201949030.2019.8959909},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/BahramaliLL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/CatalinaBSRB19,
author = {Josu Catalina and
Andoni Beriain and
H{\'{e}}ctor Solar and
David del R{\'{\i}}o and
Roc Berenguer},
title = {Review of Bandgap Voltage Reference Architectures for Long-Range Passive
{RFID} Applications},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959912},
doi = {10.1109/DCIS201949030.2019.8959912},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/CatalinaBSRB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/CuadradoK0BJ19,
author = {Carlos Cuadrado and
I{\~{n}}igo Kortabarria and
Jes{\'{u}}s L{\'{a}}zaro and
Unai Bidarte and
Jaime Jim{\'{e}}nez},
title = {Fast and efficient {FPGA} prototype system for embedded control algorithms
in electric traction},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--7},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959868},
doi = {10.1109/DCIS201949030.2019.8959868},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/CuadradoK0BJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Diez-AceredaDRP19,
author = {V. D{\'{\i}}ez{-}Acereda and
A. Diaz{-}Carballo and
R. Rodr{\'{\i}}guez{-}Hern{\'{a}}ndez and
Javier del Pino and
Sunil Lalchand Khemchandani},
title = {Power Amplifiers Load Modulation Techniques for 5G in GaN-on-Si Techonology},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959923},
doi = {10.1109/DCIS201949030.2019.8959923},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Diez-AceredaDRP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/EscolarRTBVSVL19,
author = {Soledad Escolar and
Fernando Rinc{\'{o}}n and
Xavier del Toro and
Jes{\'{u}}s Barba and
F{\'{e}}lix Jes{\'{u}}s Villanueva and
Mar{\'{\i}}a J. Santofimia and
David Villa and
Juan Carlos L{\'{o}}pez},
title = {The {PLATINO} Experience: {A} LoRa-based Network of Energy-Harvesting
Devices for Smart Farming},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959848},
doi = {10.1109/DCIS201949030.2019.8959848},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/EscolarRTBVSVL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/FabeloCAGHGMMBO19,
author = {Himar Fabelo and
Gregorio Carretero and
Pablo Almeida and
Aday Garc{\'{\i}}a and
Javier A. Hern{\'{a}}ndez and
Fred Godtliebsen and
Ver{\'{o}}nica Meli{\'{a}}n and
Beatriz Mart{\'{\i}}nez and
Patricia Beltr{\'{a}}n and
Samuel Ortega and
Margarita Marrero{-}Martin and
Gustavo Marrero Callic{\'{o}} and
Roberto Sarmiento and
Irene Casta{\~{n}}o},
title = {Dermatologic Hyperspectral Imaging System for Skin Cancer Diagnosis
Assistance},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959869},
doi = {10.1109/DCIS201949030.2019.8959869},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/FabeloCAGHGMMBO19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Fernandez-Alvarez19,
author = {Aranzazu Fernandez{-}Alvarez and
Marta Portela{-}Garc{\'{\i}}a and
Mario Garc{\'{\i}}a{-}Valderas and
Celia L{\'{o}}pez{-}Ongil and
Samuel Sordo Ib{\'{a}}{\~{n}}ez and
Servando Espejo{-}Meana},
title = {Assessing {SET} Sensitivity of Mixed-Signal Circuits at Early Design
Stages},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959892},
doi = {10.1109/DCIS201949030.2019.8959892},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Fernandez-Alvarez19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/GarciaO19,
author = {Javier Cereijo Garc{\'{\i}}a and
Roberto R. Osorio},
title = {Hardware Implementation of Statecharts for FPGA-based Control in Scientific
Facilities},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959871},
doi = {10.1109/DCIS201949030.2019.8959871},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/GarciaO19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/GuerraHRDMJLL19,
author = {Ra{\'{u}}l Guerra and
Pablo Horstrand and
Aythami Rodr{\'{\i}}guez and
Mar{\'{\i}}a D{\'{\i}}az and
Alejandro Morales and
Ad{\'{a}}n Jim{\'{e}}nez and
Sebasti{\'{a}}n L{\'{o}}pez and
Jos{\'{e}} Francisco L{\'{o}}pez},
title = {Optimal {UAV} movement control for farming area scanning using hyperspectral
pushbroom sensors},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959829},
doi = {10.1109/DCIS201949030.2019.8959829},
timestamp = {Thu, 06 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/GuerraHRDMJLL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/GutierrezL19,
author = {Valentin Gutierrez and
Gildas L{\'{e}}ger},
title = {{SET} sensitivity evaluation, a comparison before and after layout},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959828},
doi = {10.1109/DCIS201949030.2019.8959828},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/GutierrezL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/HorstrandGDMJLL19,
author = {Pablo Horstrand and
Ra{\'{u}}l Guerra and
Mar{\'{\i}}a D{\'{\i}}az and
Alejandro Morales and
Ad{\'{a}}n Jim{\'{e}}nez and
Sebasti{\'{a}}n L{\'{o}}pez and
Jos{\'{e}} Francisco L{\'{o}}pez},
title = {A spectral imaging system for precision agriculture: From its inception
till a pre-commercial prototype},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959891},
doi = {10.1109/DCIS201949030.2019.8959891},
timestamp = {Sun, 09 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/HorstrandGDMJLL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/HsuYM19,
author = {Shu{-}Han Hsu and
Kexin Yang and
Linda Milor},
title = {Reliability and Accelerated Testing of 14nm FinFET Ring Oscillators},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--7},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959834},
doi = {10.1109/DCIS201949030.2019.8959834},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/HsuYM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/LeitaoCS19,
author = {Jos{\'{e}} M. Leit{\~{a}}o and
Ricardo Chaves and
Marcelino B. Santos},
title = {Applying Model Checking in the Verification of a Clock Masking Unit},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959910},
doi = {10.1109/DCIS201949030.2019.8959910},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/LeitaoCS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/LeonDCN19,
author = {Raquel Le{\'{o}}n and
Adri{\'{a}}n Dom{\'{\i}}nguez and
Pedro P. Carballo and
Antonio N{\'{u}}{\~{n}}ez},
title = {Deep Packet Inspection Through Virtual Platforms using System-On-Chip
FPGAs},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959882},
doi = {10.1109/DCIS201949030.2019.8959882},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/LeonDCN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Lopez-AnguloGPR19,
author = {Antonio Lopez{-}Angulo and
Antonio J. Gin{\'{e}}s and
Eduardo J. Peral{\'{\i}}as and
Adoraci{\'{o}}n Rueda},
title = {Mismatch and Offset Calibration in Redundant {SAR} {ADC}},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959843},
doi = {10.1109/DCIS201949030.2019.8959843},
timestamp = {Thu, 06 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Lopez-AnguloGPR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MarinoQLRHPT19,
author = {Rodrigo Marino and
Sergio Quintero and
Jos{\'{e}} Manuel Lanza{-}Guti{\'{e}}rrez and
Teresa Riesgo and
Miguel Holgado and
Jorge Portilla and
Eduardo de la Torre},
title = {Hardware Accelerator for Ethanol Detection in Water Media based on
Machine Learning Techniques},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959937},
doi = {10.1109/DCIS201949030.2019.8959937},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MarinoQLRHPT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MirandaCLPL19,
author = {Jose Angel Miranda and
Manuel Felipe Canabal and
Jos{\'{e}} Manuel Lanza{-}Guti{\'{e}}rrez and
Marta Portela{-}Garc{\'{\i}}a and
Celia L{\'{o}}pez{-}Ongil},
title = {Toward Fear Detection using Affect Recognition},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--4},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959852},
doi = {10.1109/DCIS201949030.2019.8959852},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/MirandaCLPL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MoranRRIMC19,
author = {Alejandro Mor{\'{a}}n and
Josep L. Rossell{\'{o}} and
Miquel Roca and
Eugeni Isern and
V{\'{\i}}ctor Mart{\'{\i}}nez{-}Moll and
Vincent Canals},
title = {Self-Organizing Maps hybrid Implementation Based on Stochastic Computing},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959841},
doi = {10.1109/DCIS201949030.2019.8959841},
timestamp = {Wed, 20 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/MoranRRIMC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MorenoADVCV19,
author = {Sergio Moreno and
Oscar Alonso and
{\'{A}}ngel Di{\'{e}}guez and
Eva Vilella and
Gianluigi Casse and
Joost Vossebeld},
title = {A 28 {\(\mu\)}W timing circuit for a 60 {\(\mu\)}m\({}^{\mbox{2}}\)
{HV-CMOS} pixel},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959889},
doi = {10.1109/DCIS201949030.2019.8959889},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/MorenoADVCV19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/NietoRGSB19,
author = {Urko Nieto and
David del Rio and
I{\~{n}}aki Gurutzeaga and
H{\'{e}}ctor Solar and
Roc Berenguer},
title = {Design considerations and architectures for 250 GHz LNAs in SiGe technology},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959840},
doi = {10.1109/DCIS201949030.2019.8959840},
timestamp = {Thu, 06 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/NietoRGSB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/PiumattiBMRB19,
author = {Davide Piumatti and
Stefano Borlo and
Fabio Mandrile and
Matteo Sonza Reorda and
Radu Bojoi},
title = {Assessing the Effectiveness of the Test of Power Devices at the Board
Level},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959845},
doi = {10.1109/DCIS201949030.2019.8959845},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/PiumattiBMRB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/PosadasVS19,
author = {H{\'{e}}ctor Posadas and
Eugenio Villar and
Manuel Sanchez{-}Renedo},
title = {Accelerating Host-Compiled Simulation by Modifying {IR} Code: Industrial
application in the spatial domain},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959846},
doi = {10.1109/DCIS201949030.2019.8959846},
timestamp = {Thu, 06 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/PosadasVS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/RandoPHY19,
author = {Enrique Rando and
Pablo P{\'{e}}rez and
Gloria Huertas and
Alberto Y{\'{u}}fera},
title = {A plethysmographic sensor for monitoring volume changes in cardiovascular
pathologies},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959885},
doi = {10.1109/DCIS201949030.2019.8959885},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/RandoPHY19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/RioIGRBS19,
author = {David del Rio and
Andoni Irizar and
I{\~{n}}aki Gurutzeaga and
Ainhoa Rezola and
Roc Berenguer and
Juan F. Sevillano},
title = {Design of Integrated Control Circuits for mm-Wave Phased Arrays in
55-nm BiCMOS},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959897},
doi = {10.1109/DCIS201949030.2019.8959897},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/RioIGRBS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/RoureBGC19,
author = {Lu{\'{\i}}s Parrilla Roure and
Ahmed Mohamed Bellemou and
Antonio Garc{\'{\i}}a and
Encarnaci{\'{o}}n Castillo},
title = {Efficient Elliptic Curve Cryptoprocessor for enabling {TLS} protocol
in low-cost reconfigurable SoCs},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959862},
doi = {10.1109/DCIS201949030.2019.8959862},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/RoureBGC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/RungtaABRAM19,
author = {Anant Rungta and
Josep Altet and
Enrique Barajas and
Antonio Rubio and
Xavier Aragon{\`{e}}s and
Diego Mateo},
title = {On the Use of Built-In Temperature Sensors to Monitor Aging in {RF}
Circuits},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959904},
doi = {10.1109/DCIS201949030.2019.8959904},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/RungtaABRAM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Salas-BarenysVL19,
author = {Arnau Salas Barenys and
Neus Vidal and
Jos{\'{e}} Mar{\'{\i}}a L{\'{o}}pez{-}Villegas},
title = {3D Printed 5-Order Butterworth Passive Filter with Conical Inductors
for {RF} Broadband Applications},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959818},
doi = {10.1109/DCIS201949030.2019.8959818},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Salas-BarenysVL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SilvaA19,
author = {Jos{\'{e}} Machado da Silva and
Jos{\'{e}} Carlos Alves},
title = {An Alternative {SNR} Computation Method for {ADC} Testing},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959929},
doi = {10.1109/DCIS201949030.2019.8959929},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/SilvaA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/TurkiB19,
author = {Mariem Turki and
Davide Bertozzi},
title = {An Interconnect-Centric Approach to the Flexible Partitioning and
Isolation of Many-Core Accelerators for Fog Computing},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959943},
doi = {10.1109/DCIS201949030.2019.8959943},
timestamp = {Thu, 06 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/TurkiB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/WisultschewOPT19,
author = {Cristian Wisultschew and
Andr{\'{e}}s Otero and
Jorge Portilla and
Eduardo de la Torre},
title = {Artificial Vision on Edge IoT Devices: {A} Practical Case for 3D Data
Classification},
booktitle = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
pages = {1--7},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DCIS201949030.2019.8959857},
doi = {10.1109/DCIS201949030.2019.8959857},
timestamp = {Thu, 11 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/WisultschewOPT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/dcis/2019,
title = {{XXXIV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2019, Bilbao, Spain, November 20-22, 2019},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/xpl/conhome/8952591/proceeding},
isbn = {978-1-7281-5458-9},
timestamp = {Thu, 06 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/2019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AbadalA18,
author = {Sergi Abadal and
Eduard Alarc{\'{o}}n},
title = {Data Conversion in Area-Constrained Applications: the Wireless Network-on-Chip
Case},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681465},
doi = {10.1109/DCIS.2018.8681465},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/AbadalA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Alvarez-Carulla18,
author = {Albert {\'{A}}lvarez{-}Carulla and
Yaiza Montes{-}Cebri{\'{a}}n and
Manel Puig{-}Vidal and
Jaime L{\'{o}}pez{-}S{\'{a}}nchez and
Jordi Colomer{-}Farrarons and
Pere Llu{\'{\i}}s Miribel{-}Catal{\`{a}}},
title = {Energy-Aware Adaptative Supercapacitor Storage System for Multi-Harvesting
Solutions},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681464},
doi = {10.1109/DCIS.2018.8681464},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Alvarez-Carulla18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AmatMBPK18,
author = {Esteve Amat and
Alberto del Moral and
Joan R. Bausells and
Francesc P{\'{e}}rez{-}Murano and
Fabian J. Kl{\"{u}}pfel},
title = {Quantum dot location relevance into {SET-FET} circuits based on FinFET
devices},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681478},
doi = {10.1109/DCIS.2018.8681478},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AmatMBPK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AnnagrebahBCML18,
author = {Amina Annagrebah and
E. Bechetoille and
H. Chanal and
H. Mathez and
I. B. Laktineh},
title = {Time-To-Digital Converter with adjustable resolution using a digital
Vernier Ring Oscillator},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--4},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681494},
doi = {10.1109/DCIS.2018.8681494},
timestamp = {Tue, 24 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AnnagrebahBCML18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AsciaCMPPJ18,
author = {Giuseppe Ascia and
Vincenzo Catania and
Salvatore Monteleone and
Maurizio Palesi and
Davide Patti and
John Jose},
title = {Approximate Wireless Networks-on-Chip},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681491},
doi = {10.1109/DCIS.2018.8681491},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AsciaCMPPJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/BarrutiaHHDM18,
author = {Iban Barrutia and
Amparo Herrera and
Benoit Haentjens and
Laura Diego and
Charles A. Mjema},
title = {Multioctave Distributed {MMIC} Power Amplifier in Gallium Nitride
Technology with P1dB {\textgreater} 31dBm},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681458},
doi = {10.1109/DCIS.2018.8681458},
timestamp = {Tue, 09 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/BarrutiaHHDM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/CaiHWNLYZ18,
author = {Hao Cai and
Menglin Han and
You Wang and
Lirida A. B. Naviner and
Xinning Liu and
Jun Yang and
Weisheng Zhao},
title = {Reliability Emphasized {MTJ/CMOS} Hybrid Circuit Towards Ultra-Low
Power},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681471},
doi = {10.1109/DCIS.2018.8681471},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/CaiHWNLYZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/CaleroMLRGL18,
author = {Jose Angel Miranda Calero and
Rodrigo Marino and
Jos{\'{e}} Manuel Lanza{-}Guti{\'{e}}rrez and
Teresa Riesgo and
Mario Garc{\'{\i}}a{-}Valderas and
Celia L{\'{o}}pez{-}Ongil},
title = {Embedded Emotion Recognition within Cyber-Physical Systems using Physiological
Signals},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681496},
doi = {10.1109/DCIS.2018.8681496},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/CaleroMLRGL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/CapeleiroLCS18,
author = {Rodrigo B. Capeleiro and
Jos{\'{e}} M. Leit{\~{a}}o and
Ricardo Chaves and
Marcelino B. Santos},
title = {Low-power frequency monitoring circuit for clock failure detection},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681489},
doi = {10.1109/DCIS.2018.8681489},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/CapeleiroLCS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/CapeleiroS18,
author = {Rodrigo B. Capeleiro and
Marcelino B. Santos},
title = {Low noise, high efficiency, segmented {LCD} drivers for ultra-low
power applications in 22 nm {FD-SOI}},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681488},
doi = {10.1109/DCIS.2018.8681488},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/CapeleiroS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/ElissatiECRF18,
author = {Oussama Elissati and
Assia El{-}Hadbi and
Abdelkarim Cherkaoui and
S{\'{e}}bastien Rieubon and
Laurent Fesquet},
title = {Low Phase-Noise {CMOS} Quadrature Oscillator based on {(N} {\texttimes}
4)-stage Self-Timed Ring},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681473},
doi = {10.1109/DCIS.2018.8681473},
timestamp = {Tue, 09 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/ElissatiECRF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/FortunCGLL18,
author = {Daniel Fortun and
Carlos Garcia de la Cueva and
Jes{\'{u}}s Grajal and
Marisa L{\'{o}}pez{-}Vallejo and
Carlos A. L{\'{o}}pez{-}Barrio},
title = {Performance-oriented Implementation of Hilbert Filters on FPGAs},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681481},
doi = {10.1109/DCIS.2018.8681481},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/FortunCGLL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/FraccaroliQF18,
author = {Enrico Fraccaroli and
Davide Quaglia and
Franco Fummi},
title = {Efficient Simulation of Faults in Networked Cyber-Physical Systems},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681483},
doi = {10.1109/DCIS.2018.8681483},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/FraccaroliQF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/GadeRKD18,
author = {Sri Harsha Gade and
Sidhartha Sankar Rout and
Ravi Kashyap and
Sujay Deb},
title = {Reliability Analysis of On-Chip Wireless Links for Many Core WNoCs},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681475},
doi = {10.1109/DCIS.2018.8681475},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/GadeRKD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/GutierrezL18,
author = {Valentin Gutierrez and
Gildas L{\'{e}}ger},
title = {Single Event Transient injection in large mixed-signal circuits},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681485},
doi = {10.1109/DCIS.2018.8681485},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/GutierrezL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/HariharanGNR18,
author = {Ranganathan Hariharan and
Tara Ghasempouri and
Behrad Niazmand and
Jaan Raik},
title = {From {RTL} Liveness Assertions to Cost-Effective Hardware Checkers},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681487},
doi = {10.1109/DCIS.2018.8681487},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/HariharanGNR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/HernandezUVM18,
author = {{\'{A}}lvaro Hern{\'{a}}ndez and
Jes{\'{u}}s Ure{\~{n}}a and
Jose M. Villadangos and
Khaoula Mannay},
title = {SoC Architecture for an Ultrasonic Receiver applied to Local Positioning
Systems},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681484},
doi = {10.1109/DCIS.2018.8681484},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/HernandezUVM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/JulienBSKC18,
author = {Mohan Julien and
Serge Bernard and
Fabien Soulier and
Vincent Kerzerho and
Guy Cath{\'{e}}bras},
title = {Improvement of Active-Input Current Mirrors Using Adaptive Biasing
Technique},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--4},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681474},
doi = {10.1109/DCIS.2018.8681474},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/JulienBSKC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/KarpGKP18,
author = {Batya Karp and
Mael Gay and
Osnat Keren and
Ilia Polian},
title = {Security-oriented Code-based Architectures for Mitigating Fault Attacks},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681476},
doi = {10.1109/DCIS.2018.8681476},
timestamp = {Tue, 09 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/KarpGKP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Kharbouche-Harrari18,
author = {Mounia Kharbouche{-}Harrari and
Rana Alhalabi and
J{\'{e}}r{\'{e}}my Postel{-}Pellerin and
Romain Wacquez and
Driss Aboulkassimi and
Etienne Nowak and
Ioan Lucian Prejbeanu and
Guillaume Prenat and
Gregory di Pendina},
title = {{MRAM:} from {STT} to SOT, for security and memory},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681468},
doi = {10.1109/DCIS.2018.8681468},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Kharbouche-Harrari18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/LevisseGNMP18,
author = {Alexandre Levisse and
Bastien Giraud and
Jean{-}Philippe No{\"{e}}l and
Mathieu Moreau and
Jean{-}Michel Portal},
title = {{RRAM} Crossbar Arrays for Storage Class Memory Applications: Throughput
and Density Considerations},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681470},
doi = {10.1109/DCIS.2018.8681470},
timestamp = {Fri, 24 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/LevisseGNMP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/LuoPKCOSB18,
author = {Jiating Luo and
Van{-}Dung Pham and
C{\'{e}}dric Killian and
Daniel Chillet and
Ian O'Connor and
Olivier Sentieys and
S{\'{e}}bastien Le Beux},
title = {Run-Time management of energy-performance trade-off in Optical Network-on-Chip},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681477},
doi = {10.1109/DCIS.2018.8681477},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/LuoPKCOSB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Montes-CebrianA18,
author = {Yaiza Montes{-}Cebri{\'{a}}n and
Albert {\'{A}}lvarez{-}Carulla and
Jordi Colomer{-}Farrarons and
Manel Puig{-}Vidal and
Jaime L{\'{o}}pez{-}S{\'{a}}nchez and
Pere Llu{\'{\i}}s Miribel{-}Catal{\`{a}}},
title = {A Fuel Cell-based adaptable Self-Powered Event Detection platform
enhanced for biosampling applications},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681482},
doi = {10.1109/DCIS.2018.8681482},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Montes-CebrianA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/NietoMH18,
author = {Rub{\'{e}}n Nieto and
Ra{\'{u}}l Mateos and
{\'{A}}lvaro Hern{\'{a}}ndez},
title = {Finite Precision Analysis of FPGA-based Architecture for {FBMC} Transmultiplexers
in Broadband {PLC}},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681466},
doi = {10.1109/DCIS.2018.8681466},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/NietoMH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/PedroMRNA18,
author = {Marta Pedro and
Javier Mart{\'{\i}}n{-}Mart{\'{\i}}nez and
Rosana Rodr{\'{\i}}guez and
Montserrat Nafr{\'{\i}}a and
Xavier Aymerich},
title = {Investigation of Conductivity Changes in Memristors under Massive
Pulsed Characterization},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--4},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681457},
doi = {10.1109/DCIS.2018.8681457},
timestamp = {Tue, 03 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/PedroMRNA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/PerodouKSO18,
author = {Arthur Perodou and
Anton Korniienko and
G{\'{e}}rard Scorletti and
Ian O'Connor},
title = {Systematic Design Method of Passive Ladder Filters using a Generalised
Variable},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681463},
doi = {10.1109/DCIS.2018.8681463},
timestamp = {Fri, 05 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/PerodouKSO18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/PeschaH18,
author = {David Pescha and
Martin Horauer},
title = {Event Storms in {IEC} 61499 Applications},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681462},
doi = {10.1109/DCIS.2018.8681462},
timestamp = {Tue, 09 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/PeschaH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/PiumattiR18,
author = {Davide Piumatti and
Matteo Sonza Reorda},
title = {Assessing Test Procedure Effectiveness for Power Devices},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681495},
doi = {10.1109/DCIS.2018.8681495},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/PiumattiR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Portela-GarciaM18,
author = {Marta Portela{-}Garc{\'{\i}}a and
V. M. Medina and
S. Paton},
title = {Vector-Based Mismatch Shaping circuit for a low {IF} Multibit {\(\Sigma\)}{\unicode{8710}}
{ADC}},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681459},
doi = {10.1109/DCIS.2018.8681459},
timestamp = {Tue, 01 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/Portela-GarciaM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Potestad-Ordonez18,
author = {Francisco Eugenio Potestad{-}Ord{\'{o}}{\~{n}}ez and
Carlos Jes{\'{u}}s Jim{\'{e}}nez{-}Fern{\'{a}}ndez and
Carmen Baena Oliva and
Pilar Parra Fern{\'{a}}ndez and
Manuel Valencia{-}Barrero},
title = {Floorplanning as a practical countermeasure against clock fault attack
in Trivium stream cipher},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681467},
doi = {10.1109/DCIS.2018.8681467},
timestamp = {Thu, 21 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Potestad-Ordonez18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/RigaultMLO18,
author = {Samuel Rigault and
Nicolas Moeneclaey and
Lioua Labrak and
Ian O'Connor},
title = {{CMOS} {VCSEL} driver dedicated for sub-nanosecond laser pulses generation
in SPAD-based time-of-flight rangefinder},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681460},
doi = {10.1109/DCIS.2018.8681460},
timestamp = {Tue, 19 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/RigaultMLO18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/RodriguesOBKF18,
author = {Gennaro Severino Rodrigues and
{\'{A}}dria Barros de Oliveira and
Alberto Bosio and
Fernanda Lima Kastensmidt and
Edison Pignaton de Freitas},
title = {{ARFT:} An Approximative Redundant Technique for Fault Tolerance},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681499},
doi = {10.1109/DCIS.2018.8681499},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/RodriguesOBKF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/RodriguezA0BJ18,
author = {Mikel Rodriguez and
Armando Astarloa and
Jes{\'{u}}s L{\'{a}}zaro and
Unai Bidarte and
Jaime Jimenez},
title = {System-on-Programmable-Chip {AES-GCM} implementation for wire-speed
cryptography for {SAS}},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681469},
doi = {10.1109/DCIS.2018.8681469},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/RodriguezA0BJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/SilvaLP18,
author = {Thais Luana Vidal de Negreiros da Silva and
Guo{-}Neng Lu and
Patrick Pittet},
title = {Breakdown Voltage Shift of {CMOS} Buried Quad Junction {(BQJ)} Detector},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681493},
doi = {10.1109/DCIS.2018.8681493},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/SilvaLP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/TalaSKB18,
author = {Mahdi Tala and
Oliver Schrape and
Milos Krstic and
Davide Bertozzi},
title = {Exploring the Performance-Energy Optimization Space of a Bridge Between
3D-Stacked Electronic and Optical Networks-on-Chip},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681461},
doi = {10.1109/DCIS.2018.8681461},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/TalaSKB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/TapGMM18,
author = {H{\'{e}}l{\`{e}}ne Tap and
Laurent Gatet and
Emmanuel Moutaye and
Blaise Mulliez},
title = {Embedded System for Distance Measurement and Surface Discrimination
Applications},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681480},
doi = {10.1109/DCIS.2018.8681480},
timestamp = {Mon, 03 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/TapGMM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/TeixeiraS18,
author = {Rui Moutinho Teixeira and
Jos{\'{e}} Machado da Silva},
title = {Design for Calibratability of a N-Integer Low-Frequency Phase-Locked
Loop},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681479},
doi = {10.1109/DCIS.2018.8681479},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/TeixeiraS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Tena-SanchezDNA18,
author = {Erica Tena{-}S{\'{a}}nchez and
Ignacio M. Delgado{-}Lozano and
Juan N{\'{u}}{\~{n}}ez and
Antonio J. Acosta},
title = {Benchmarking of nanometer technologies for DPA-resilient DPL-based
cryptocircuits},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681472},
doi = {10.1109/DCIS.2018.8681472},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Tena-SanchezDNA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/ToniIDCA18,
author = {Arnaud Toni and
Hassan Ihs and
Taner Dosluoglu and
Remy Cellier and
Nacer Abouchi},
title = {An integrated 10MHz 3 States Buck converter for fast transient response
in 180nm {CMOS}},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--4},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681490},
doi = {10.1109/DCIS.2018.8681490},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/ToniIDCA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/YangZLKM18,
author = {Kexin Yang and
Rui Zhang and
Taizhi Liu and
Dae Hyun Kim and
Linda Milor},
title = {Optimal Accelerated Test Regions for Time- Dependent Dielectric Breakdown
Lifetime Parameters Estimation in FinFET Technology},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681497},
doi = {10.1109/DCIS.2018.8681497},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/YangZLKM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/ZamoraLUB18,
author = {Iv{\'{a}}n Zamora and
Eyglis Ledesma and
Arantxa Uranga and
N{\'{u}}ria Barniol},
title = {Design of a Fully Integrated {CMOS-PMUT} System},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681498},
doi = {10.1109/DCIS.2018.8681498},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/ZamoraLUB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/ZhangYLM18,
author = {Rui Zhang and
Kexin Yang and
Taizhi Liu and
Linda Milor},
title = {Estimation of the Optimal Accelerated Test Region for FinFET SRAMs
Degraded by Front-End and Back-End Wearout Mechanisms},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681492},
doi = {10.1109/DCIS.2018.8681492},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/ZhangYLM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/ZuriarrainBBRBS18,
author = {X. Zuriarrain and
Andoni Beriain and
Guillermo Bistu{\'{e}} and
David del Rio and
Roc Berenguer and
H{\'{e}}ctor Solar and
Javier Sosa and
Juan A. Montiel{-}Nelson},
title = {A {CMOS} Low Frequency Analog {RFID} Front-End for the IoT},
booktitle = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/DCIS.2018.8681486},
doi = {10.1109/DCIS.2018.8681486},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/ZuriarrainBBRBS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/dcis/2018,
title = {Conference on Design of Circuits and Integrated Systems, {DCIS} 2018,
Lyon, France, November 14-16, 2018},
publisher = {{IEEE}},
year = {2018},
url = {https://ieeexplore.ieee.org/xpl/conhome/8679952/proceeding},
isbn = {978-1-7281-0171-2},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/2018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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