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@proceedings{DBLP:conf/fdl/2012s,
  editor       = {Jan Haase},
  title        = {Models, Methods, and Tools for Complex Chip Design - Selected Contributions
                  from {FDL} 2012},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {265},
  publisher    = {Springer},
  year         = {2014},
  url          = {https://doi.org/10.1007/978-3-319-01418-0},
  doi          = {10.1007/978-3-319-01418-0},
  isbn         = {978-3-319-01417-3},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fdl/2012s.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/AlwiBE12a,
  author       = {Syed Hussein Syed Alwi and
                  C{\'{e}}cile Braunstein and
                  Emmanuelle Encrenaz},
  editor       = {Jan Haase},
  title        = {Efficient Refinement Strategy Exploiting Component Properties in a
                  {CEGAR} Process},
  booktitle    = {Models, Methods, and Tools for Complex Chip Design - Selected Contributions
                  from {FDL} 2012},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {265},
  pages        = {17--36},
  publisher    = {Springer},
  year         = {2012},
  url          = {https://doi.org/10.1007/978-3-319-01418-0\_2},
  doi          = {10.1007/978-3-319-01418-0\_2},
  timestamp    = {Sun, 02 Oct 2022 16:01:15 +0200},
  biburl       = {https://dblp.org/rec/conf/fdl/AlwiBE12a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/BaoBWSK12a,
  author       = {Binghao Bao and
                  J{\"{o}}rg Bormann and
                  Markus Wedler and
                  Dominik Stoffel and
                  Wolfgang Kunz},
  editor       = {Jan Haase},
  title        = {Formal Plausibility Checks for Environment Constraints},
  booktitle    = {Models, Methods, and Tools for Complex Chip Design - Selected Contributions
                  from {FDL} 2012},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {265},
  pages        = {1--16},
  publisher    = {Springer},
  year         = {2012},
  url          = {https://doi.org/10.1007/978-3-319-01418-0\_1},
  doi          = {10.1007/978-3-319-01418-0\_1},
  timestamp    = {Wed, 06 Mar 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fdl/BaoBWSK12a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/DrechslerSW12a,
  author       = {Rolf Drechsler and
                  Mathias Soeken and
                  Robert Wille},
  editor       = {Jan Haase},
  title        = {Formal Specification Level},
  booktitle    = {Models, Methods, and Tools for Complex Chip Design - Selected Contributions
                  from {FDL} 2012},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {265},
  pages        = {37--52},
  publisher    = {Springer},
  year         = {2012},
  url          = {https://doi.org/10.1007/978-3-319-01418-0\_3},
  doi          = {10.1007/978-3-319-01418-0\_3},
  timestamp    = {Sun, 02 Jun 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fdl/DrechslerSW12a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/GlaserW12,
  author       = {Johann Glaser and
                  Clifford Wolf},
  editor       = {Jan Haase},
  title        = {Methodology and Example-Driven Interconnect Synthesis for Designing
                  Heterogeneous Coarse-Grain Reconfigurable Architectures},
  booktitle    = {Models, Methods, and Tools for Complex Chip Design - Selected Contributions
                  from {FDL} 2012},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {265},
  pages        = {201--221},
  publisher    = {Springer},
  year         = {2012},
  url          = {https://doi.org/10.1007/978-3-319-01418-0\_12},
  doi          = {10.1007/978-3-319-01418-0\_12},
  timestamp    = {Wed, 06 Mar 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fdl/GlaserW12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/GreavesY12a,
  author       = {David J. Greaves and
                  Muhammad Mehboob Yasin},
  editor       = {Jan Haase},
  title        = {{TLM} {POWER3:} Power Estimation Methodology for SystemC {TLM} 2.0},
  booktitle    = {Models, Methods, and Tools for Complex Chip Design - Selected Contributions
                  from {FDL} 2012},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {265},
  pages        = {53--68},
  publisher    = {Springer},
  year         = {2012},
  url          = {https://doi.org/10.1007/978-3-319-01418-0\_4},
  doi          = {10.1007/978-3-319-01418-0\_4},
  timestamp    = {Wed, 07 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fdl/GreavesY12a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/HarrantN0P12,
  author       = {Manuel Harrant and
                  Thomas Nirmaier and
                  Christoph Grimm and
                  Georg Pelz},
  editor       = {Jan Haase},
  title        = {Configurable Load Emulation Using {FPGA} and Power Amplifiers for
                  Automotive Power ICs},
  booktitle    = {Models, Methods, and Tools for Complex Chip Design - Selected Contributions
                  from {FDL} 2012},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {265},
  pages        = {109--126},
  publisher    = {Springer},
  year         = {2012},
  url          = {https://doi.org/10.1007/978-3-319-01418-0\_7},
  doi          = {10.1007/978-3-319-01418-0\_7},
  timestamp    = {Wed, 29 May 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fdl/HarrantN0P12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/HerreraPPV12a,
  author       = {Fernando Herrera and
                  Pablo Pe{\~{n}}il and
                  Hector Posadas and
                  Eugenio Villar},
  editor       = {Jan Haase},
  title        = {Model-Driven Methodology for the Development of Multi-level Executable
                  Environments},
  booktitle    = {Models, Methods, and Tools for Complex Chip Design - Selected Contributions
                  from {FDL} 2012},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {265},
  pages        = {145--164},
  publisher    = {Springer},
  year         = {2012},
  url          = {https://doi.org/10.1007/978-3-319-01418-0\_9},
  doi          = {10.1007/978-3-319-01418-0\_9},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fdl/HerreraPPV12a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/LiIJL12a,
  author       = {Yao Li and
                  Ramy Iskander and
                  Farakh Javid and
                  Marie{-}Minerve Lou{\"{e}}rat},
  editor       = {Jan Haase},
  title        = {A Design and Verification Methodology for Mixed-Signal Systems Using
                  SystemC-AMS},
  booktitle    = {Models, Methods, and Tools for Complex Chip Design - Selected Contributions
                  from {FDL} 2012},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {265},
  pages        = {89--108},
  publisher    = {Springer},
  year         = {2012},
  url          = {https://doi.org/10.1007/978-3-319-01418-0\_6},
  doi          = {10.1007/978-3-319-01418-0\_6},
  timestamp    = {Fri, 13 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fdl/LiIJL12a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/MohantyK12,
  author       = {Saraju P. Mohanty and
                  Elias Kougianos},
  editor       = {Jan Haase},
  title        = {Polynomial Metamodel-Based Fast Optimization of Nanoscale {PLL} Components},
  booktitle    = {Models, Methods, and Tools for Complex Chip Design - Selected Contributions
                  from {FDL} 2012},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {265},
  pages        = {179--199},
  publisher    = {Springer},
  year         = {2012},
  url          = {https://doi.org/10.1007/978-3-319-01418-0\_11},
  doi          = {10.1007/978-3-319-01418-0\_11},
  timestamp    = {Wed, 06 Mar 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fdl/MohantyK12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/MolinaDHH012,
  author       = {Javier Moreno Molina and
                  Markus Damm and
                  Jan Haase and
                  Edgar Holleis and
                  Christoph Grimm},
  editor       = {Jan Haase},
  title        = {Model Based Design of Distributed Embedded Cyber Physical Systems},
  booktitle    = {Models, Methods, and Tools for Complex Chip Design - Selected Contributions
                  from {FDL} 2012},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {265},
  pages        = {127--143},
  publisher    = {Springer},
  year         = {2012},
  url          = {https://doi.org/10.1007/978-3-319-01418-0\_8},
  doi          = {10.1007/978-3-319-01418-0\_8},
  timestamp    = {Wed, 02 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fdl/MolinaDHH012.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/TomicHL12,
  author       = {Slobodanka Tomic and
                  Jan Haase and
                  Goran Lazendic},
  editor       = {Jan Haase},
  title        = {{GREEN} {HOME:} The Concept and Study of Grid Responsiveness},
  booktitle    = {Models, Methods, and Tools for Complex Chip Design - Selected Contributions
                  from {FDL} 2012},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {265},
  pages        = {165--178},
  publisher    = {Springer},
  year         = {2012},
  url          = {https://doi.org/10.1007/978-3-319-01418-0\_10},
  doi          = {10.1007/978-3-319-01418-0\_10},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fdl/TomicHL12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/WeinstockSLA12,
  author       = {Jan Henrik Weinstock and
                  Christoph Schumacher and
                  Rainer Leupers and
                  Gerd Ascheid},
  editor       = {Jan Haase},
  title        = {SCandal: SystemC Analysis for Nondeterminism Anomalies},
  booktitle    = {Models, Methods, and Tools for Complex Chip Design - Selected Contributions
                  from {FDL} 2012},
  series       = {Lecture Notes in Electrical Engineering},
  volume       = {265},
  pages        = {69--88},
  publisher    = {Springer},
  year         = {2012},
  url          = {https://doi.org/10.1007/978-3-319-01418-0\_5},
  doi          = {10.1007/978-3-319-01418-0\_5},
  timestamp    = {Wed, 06 Mar 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fdl/WeinstockSLA12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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