"Building and analyzing processing graphs on FPGAs with strong time and ..."

Ke Du (2018)

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DOI: —

access: open

type: Book or Thesis

metadata version: 2022-07-29

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Ke Du:
Building and analyzing processing graphs on FPGAs with strong time and hardware constraints. (Création et analyse de graphes de traitements sur FPGA, sous contraintes matérielles et contexte temps réel dur). University of Burgundy - Franche-Comté, France, 2018

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