"Design Methodology of a Low-Energy Reconfigurable Single-Chip DSP System."

Marlene Wan et al. (2001)

> Home

Details and statistics

DOI: 10.1023/A:1008159121620

access: closed

type: Journal Article

metadata version: 2022-07-12

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/vlsisp/WanZGBAPR01
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/vlsisp/WanZGBAPR01
Marlene Wan, Hui Zhang, George Varghese, Martin Benes, Arthur Abnous, Vandana Prabhu, Jan M. Rabaey:
Design Methodology of a Low-Energy Reconfigurable Single-Chip DSP System. J. VLSI Signal Process. 28(1-2): 47-61 (2001)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.