default search action
"Reduced Voltage Scaling in Clock Distribution Networks."
Khader Mohammad et al. (2009)
- Khader Mohammad, Ayman Dodin, Bao Liu, Sos S. Agaian:
Reduced Voltage Scaling in Clock Distribution Networks. VLSI Design 2009: 679853:1-679853:7 (2009)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.