Stop the war!
Остановите войну!
for scientists:
default search action
"Timing Challenges for Very Deep Sub-Micron (VDSM) IC."
Ichiang Lin, Chien-In Henry Chen (2002)
- Ichiang Lin, Chien-In Henry Chen:
Timing Challenges for Very Deep Sub-Micron (VDSM) IC. VLSI Design 15(3): 557-562 (2002)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.