"Design of Low Power Multiplier with Energy Efficient Full Adder Using DPTAAL."

A. Kishore Kumar et al. (2013)

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DOI: 10.1155/2013/157872

access: open

type: Journal Article

metadata version: 2019-06-02

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  - https://dblp.org/rec/journals/vlsi/KumarSDP13
A. Kishore Kumar, D. Somasundareswari, V. Duraisamy, T. Shunbaga Pradeepa:
Design of Low Power Multiplier with Energy Efficient Full Adder Using DPTAAL. VLSI Design 2013: 157872:1-157872:9 (2013)

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