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"Performance Driven Global Routing Through Gradual Refinement."

Jiang Hu, Sachin S. Sapatnekar (2002)

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DOI: 10.1080/1065514021000012219

access: open

type: Journal Article

metadata version: 2023-05-08

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  - journals/vlsi/HuS02
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  - https://dblp.org/rec/journals/vlsi/HuS02
Jiang Hu, Sachin S. Sapatnekar:
Performance Driven Global Routing Through Gradual Refinement. VLSI Design 15(3): 595-604 (2002)

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