"Automatic delay correction method for IP block-based design of VLSI ..."

Nacer-Eddine Zergainoh, Ludovic Tambour, Ahmed Amine Jerraya (2006)

> Home

Details and statistics

DOI: 10.1109/TVLSI.2006.874360

access: closed

type: Journal Article

metadata version: 2020-03-11

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tvlsi/ZergainohTJ06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tvlsi/ZergainohTJ06
Nacer-Eddine Zergainoh, Ludovic Tambour, Ahmed Amine Jerraya:
Automatic delay correction method for IP block-based design of VLSI dedicated digital signal processing systems: theoretical foundations and implementation. IEEE Trans. Very Large Scale Integr. Syst. 14(4): 349-360 (2006)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.